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PDF MCP19110 Data sheet ( Hoja de datos )
| Número de pieza | MCP19110 | |
| Descripción | Digitally-Enhanced Power Analog Controller | |
| Fabricantes | Microchip | |
| Logotipo |  |
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MCP19110/11
Digitally-Enhanced Power Analog Controller
with Integrated Synchronous Driver
Synchronous Buck Features
• Input Voltage: 4.5V to 32V
• Output Voltage: 0.5V to 3.6V
- Greater than 3.6V requires external divider
• Switching Frequency: 100 kHz to 1.6 MHz
• Quiescent Current: 5 mA Typical
• High-Drive:
- +5V Gate Drive
- 1A/2A Source Current
- 1A/2A Sink Current
• Low-Drive:
- +5V Gate Drive
- 2A Source Current
- 4A Sink Current
• Peak Current Mode Control
• Differential Remote Output Sense
• Multi-Phase Systems:
- Master or Slave
- Frequency Synchronized
- Common Error Signal
• Multiple Output Systems:
- Master or Slave
- Frequency Synchronized
- AEC-Q100 Qualified
• Configurable Parameters:
- Overcurrent Limit
- Input Undervoltage Lockout
- Output Overvoltage
- Output Undervoltage
- Internal Analog Compensation
- Soft Start Profile
- Synchronous Driver Dead Time
- Switching Frequency
• Thermal Shutdown
Microcontroller Features
• Precision 8 MHz Internal Oscillator Block:
- Factory Calibrated
• Interrupt Capable
- Firmware
- Interrupt-on-Change Pins
• Only 35 Instructions to Learn
• 4096 Words On-Chip Program Memory
• High Endurance Flash:
- 100,000 write Flash Endurance
- Flash Retention: >40 years
• Watchdog Timer (WDT) with Independent
Oscillator for Reliable Operation
• Programmable Code Protection
• In-Circuit Debug (ICD) via Two Pins (MCP19111)
• In-Circuit Serial Programming™ (ICSP™) via Two
Pins
• 11 I/O Pins and One Input-Only Pin (MCP19110)
- Three Open-Drain Pins
• 14 I/O Pins and One Input-Only Pin (MCP19111)
- Three Open-Drain Pins
• Analog-to-Digital Converter (ADC):
- 10-bit Resolution
- 12 Internal Channels
- Eight External Channels
• Timer0: 8-bit Timer/Counter with 8-Bit Prescaler
• Enhanced Timer1:
- 16-bit Timer/Counter with Prescaler
- Two Selectable Clock Sources
• Timer2: 8-Bit Timer/Counter with Prescaler
- 8-bit Period Register
• I2C Communication:
- 7-bit Address Masking
- Two Dedicated Address Registers
- SMBus/PMBusTM Compatibility
2013-2016 Microchip Technology Inc.
DS20002331D-page 1
1 page  
MCP19110/11
TABLE 2: 28-PIN SUMMARY
I/O
Basic
Additional
GPA0 1 Y AN0 — — IOC Y
GPA1 2 Y AN1 — — IOC Y
— Analog Debug Output (1)
— Sync. Signal In/Out (2, 3)
GPA2 3
Y
AN2 T0CKI —
IOC
Y
INT
—
—
GPA3 5 Y AN3
— IOC
Y
—
—
GPA4 9
N
— — — IOC N
—
—
GPA5 8
N
—
—
—
IOC(4)
Y(5)
MCLR
—
GPA6 7
N
— — — IOC N
—
—
GPA7 6
N
— — SCL IOC N
—
—
GPB0
GPB1
10
26
N
Y
— — SDA IOC
AN4 — — IOC
N
Y
—
—
—
Error Signal In/Out (3)
GPB2 28
Y
AN5 —
— IOC
Y
—
—
GPB4 4 Y AN6 — — IOC Y ICSPDAT
ICDDAT
—
GPB5 27
Y
AN7 —
— IOC
Y ICSPCLK
ICDCLK
Alternate Sync
Signal In/Out (2, 3)
GPB6 21
N
— — — IOC Y
—
—
GPB7 11
N
— — — IOC Y
—
—
VIN 13 N — — — — —
VIN
Device Input Voltage
VDR 16 N — — — — — VDR Gate Drive Supply Input
Voltage
VDD 20 N — — — — —
VDD Internal Regulator Output
GND 12
N
———
—
—
GND
Small Signal Ground
PGND
14
N
———
—
—
LDRV 15
N
———
—
—
—
—
Large Signal Ground
Low-Side MOSFET
Connection
HDRV 18
N
———
—
—
—
High-Side MOSFET
Connection
PHASE 17
N
———
—
—
—
Switch Node
BOOT 19
N
———
—
—
— Floating Bootstrap Supply
+VSEN 24
N
———
—
—
—
Output Voltage
Differential Sense
-VSEN 25
N
———
—
—
—
Output Voltage
Differential Sense
+ISEN
-ISEN
Note 1:
2:
3:
4:
5:
23 N — — — — —
—
Current Sense Input
22 N — — — — —
—
Current Sense Input
The Analog Debug Output is selected when the ATSTCON<BNCHEN> bit is set.
Selected when device is functioning as multiple output master or slave by proper configuration of the MLTPH<2:0> bits
in the BUFFCON register.
Selected when device is functioning as multi-phase master or slave by proper configuration of the MLTPH<2:0> bits in
the BUFFCON register.
The IOC is disabled when MCLR is enabled.
Weak pull-up always enabled when MCLR is enabled, otherwise the pull-up is under user control.
2013-2016 Microchip Technology Inc.
DS20002331D-page 5
5 Page 
MCP19110/11
FIGURE 1-3:
MICROCONTROLLER CORE BLOCK DIAGRAM
Configuration
Flash
4K x 14
Program
Memory
Program
Bus
14
Instruction reg
13
Program Counter
Data Bus
8
8 Level Stack
(13-bit)
RAM
256
bytes
RegFiisleters
RAM Addr
9
Addr MUX
Direct Addr 7
Indirect
8 Addr
FSR reg
STATUS reg
8
TESTCLKIN
Instruction
Decode &
Control
Timing
Generation
8 MHz Internal
Oscillator
Power-up
Timer
Power-on
Reset
Watchdog
Timer
3 MUX
ALU
8
W reg
PORTA
PORTB
MSSP
T0CKI
Timer0
MCLR VIN VSS
Timer1
Timer2
PMDATL
Self read/
write flash
memory
EEADDR
GPA0
GPA1
GPA2
GPA3
GPA4
GPA5
GPA6
GPA7
GPB0
GPB1
GPB2
GPB4 (MCP19111)
GPB5 (MCP19111)
GPB6 (MCP19111)
GPB7 (MCP19111)
SDA
SCL
Analog Interface
Registers
PWM
2013-2016 Microchip Technology Inc.
DS20002331D-page 11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet MCP19110.PDF ] | |
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