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PDF MCP2003A Data sheet ( Hoja de datos )
| Número de pieza | MCP2003A | |
| Descripción | LIN J2602 Transceiver | |
| Fabricantes | Microchip | |
| Logotipo |  |
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MCP2003/4/3A/4A
LIN J2602 Transceiver
Features:
• The MCP2003/2003A and MCP2004/2004A are
compliant with Local Interconnect Network (LIN)
Bus Specifications 1.3, 2.0 and 2.1 and are
compliant to SAE J2602
• Support Baud Rates up to 20 kbaudwith
LIN-Compatible Output Driver
• 43V Load Dump Protected
• Very Low High Electromagnetic Immunity (EMI)
meets Stringent Original Equipment Manufactur-
ers (OEM) Requirements
• Very High Electrostatic Discharge (ESD)
Immunity:
- >20 kV on VBB (IEC 61000-4-2)
- >14 kV on LBUS (IEC 61000-4-2)
• Very High Immunity to RF Disturbances meets
Stringent OEM Requirements
• Wide Supply Voltage, 6.0V-27.0V Continuous
• Extended Temperature Range: -40 to +125°C
• Interface to PIC® MCU EUSART and Standard
USARTs
• LIN Bus Pin:
- Internal pull-up resistor and diode
- Protected against battery shorts
- Protected against loss of ground
- High current drive
• Automatic Thermal Shutdown
• Low-Power mode:
- Receiver monitoring bus and transmitter off,
( 5 µA)
Description:
This device provides a bidirectional, half-duplex
communication, physical interface to automotive and
industrial LIN systems to meet the LIN Bus
Specification Revision 2.1 and SAE J2602. The device
is short-circuit and over-temperature protected by
internal circuitry. The device has been specifically
designed to operate in the automotive operating
environment and will survive all specified transient
conditions while meeting all of the stringent quiescent
current requirements.
MCP200X family members:
• 8-pin PDIP, DFN and SOIC packages:
- MCP2003, LIN-compatible driver, with WAKE
pins, wake-up on falling edge of LBUS
- MCP2003A, LIN-compatible driver, with
WAKE pins, wake-up on rising edge of LBUS
- MCP2004, LIN-compatible driver, with
FAULT/TXE pins, wake-up on falling edge of
LBUS
- MCP2004A, LIN-compatible driver, with
FAULT/TXE pins, wake-up on rising edge of
LBUS
Package Types
MCP2003/2003A
PDIP, SOIC
MCP2004/2004A
PDIP, SOIC
RXD 1
CS 2
WAKE 3
TXD 4
8 VREN
RXD 1
7 VBB CS/WAKE 2
6 LBUS FAULT/TXE 3
5 VSS
TXD 4
8 VREN
7 VBB
6 LBUS
5 VSS
MCP2003/2003A
4x4 DFN*
MCP2004/2004A
4x4 DFN*
RXD 1
8 VREN
RXD 1
8 VREN
CS 2 EP 7 VBB CS/WAKE 2 EP 7 VBB
WAKE 3 9 6 LBUS FAULT/TXE 3 9 6 LBUS
TXD 4
5 VSS
TXD 4
5 VSS
* Includes Exposed Thermal Pad (EP); see Table 1-2.
2010-2014 Microchip Technology Inc.
DS20002230F-page 1
1 page  
MCP2003/4/3A/4A
FIGURE 1-3:
OPERATIONAL MODES STATE DIAGRAM – MCP2003A
POR
VREN OFF
RX OFF
TX OFF
VBAT > 5.5V
Ready
VREN ON
RX OFF
TX OFF
CS = 1 & TXD = 0
CS = 1 & TXD = 1
Rising edge on LIN
or CS = 1
Or falling edge on WAKE pin
TOFF
Mode
VREN ON
RX ON
TX OFF
CS = 1 & TXD = 1 & No Fault
Fault (thermal or timer)
Operation
Mode
VREN ON
RX ON
TX ON
CS = 0
POWER
DOWN
VREN OFF
RX OFF
TX OFF
CS = 0
FIGURE 1-4:
OPERATIONAL MODES STATE DIAGRAM – MCP2004
POR
VREN OFF
RX OFF
TX OFF
VBAT > 5.5V
Falling edge on LIN or
CS = 1
Ready
VREN ON
RX ON
TX OFF
CS = 1 & TXD = 1 & TXE = 1
CS = 1 & (TXE = 0 or TXD = 0)
TOFF
Mode
VREN ON
RX ON
TX OFF
CS = 1 & TXD = 1 & TXE = 1
& No Fault
Fault (thermal or timeout) or
FAULT/TXE = 0
Operation
Mode
VREN ON
RX ON
TX ON
CS = 0
POWER
DOWN
VREN OFF
RX OFF
TX OFF
CS = 0
2010-2014 Microchip Technology Inc.
DS20002230F-page 5
5 Page 
MCP2003/4/3A/4A
1.6 MCP2003/4 and MCP2003A/4A
Difference Details
The differences between the MCP2003/4 and the
MCP2003/4A devices are isolated to the wake-up func-
tionality. The changes were implemented to make the
device more robust to LIN bus conditions, outside of
the normal operating conditions. The MCP2003/4 will
wake-up from Power-Down mode during any LIN falling
edge held low longer than 20 µs.
In the case where a LIN system is designed to minimize
stand-by current by disconnecting all bus pull-ups
resistors (including the external master pull-up resistor
to VBB), the original MCP2003/4 could wake-up, if the
floating bus drifted to a valid low level. The
MCP2003/4A revisions were modified to require a ris-
ing edge after a valid low level. This will prevent an
undesired system wake-up in this scenario, while main-
taining functional capability with the original version.
It should be noted that the original MCP2003/4 meets
all LIN transceiver specification requirements and mod-
ules can be designed to pass all LIN system require-
ments. However, when all bus pull-up resistors are
disconnected, the MCP2003/4 requires the module
designer to write firmware to monitor the LIN Bus after
any wake-up event to prevent the transceiver from
automatically transitioning from Ready mode to
Operational mode.
If the MCP2003/4 is placed into Operational mode, VBB
to LBUS pull-up resistor is automatically connected,
which will raise the LIN bus to a recessive level; then
putting the device to Power-Down mode may cause
LBUS to be floating, and thus wake-up all bus nodes. To
prevent this, the designer should ensure
TXD (MCP2003) or TXE (MCP2004) is held low until
valid bus activity is verified (see Figure 1-6). This will
ensure the transceiver transitions from Ready mode to
Transmitter Off mode, until bus activity can be verified.
In the case of valid bus activity, the transceiver can shift
to Operation mode, while if there is no bus activity, the
device can be again placed into Power Down. The
design practices needed to accomplish this are fully
detailed in Tech Brief TB3067 – “MCP2003 Power-
Down Mode and Wake-Up Handling in Case of LIN Bus
Loss” (DS93067).
The revised MCP2003/4A devices now eliminate the
need for firmware to prevent system wide wake-up.
The revised devices now require a longer valid bus low
(see updated tBDB value in Section 2.3 “DC Specifi-
cations” and Figure 2-7), which enables a rising edge
detect circuit. The device will now only wake-up after a
rising edge, following a low longer than tBDB. While the
module designer can still hold TXD (MCP2003) or
TXE (MCP2004) low during wake-up, to enter Transmit-
ter Off mode from Ready mode, it is not required to
prevent an advertent system wake-up.
In addition to the longer tBDB value, the time from wake-
up detect to VREN enable is shortened as documented
in Section 2.3 “DC Specifications”.
FIGURE 1-6:
MCP2003/2004 SWITCHING TIMING DIAGRAM FOR THE FORCED POWER-
DOWN MODE SEQUENCE
tTx2CS 100nstCSactive 100µs
CS
VREN
TXD state depending
on how the Slave
Microcontroller is
powered
TXD
TXD to
forced
externally
LBUS
LIN bus
disconnected
Power Down
State Mode after Master
Sleep instruction
Ready
Mode
Transmitter OFF
Mode
Power Down
Mode
2010-2014 Microchip Technology Inc.
DS20002230F-page 11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet MCP2003A.PDF ] | |
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