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CAP1296 데이터시트 PDF




Microchip에서 제조한 전자 부품 CAP1296은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


 

PDF 형식의 CAP1296 자료 제공

부품번호 CAP1296 기능
기능 6-Channel Capacitive Touch Sensor
제조업체 Microchip
로고 Microchip 로고


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CAP1296 데이터시트, 핀배열, 회로
CAP1296
6-Channel Capacitive Touch Sensor with Proximity
Detection & Signal Guard
General Description
The CAP1296 is a multiple channel capacitive touch
sensor controller. It contains six (6) individual capaci-
tive touch sensor inputs with programmable sensitivity
for use in touch sensor applications. Each sensor input
is calibrated to compensate for system parasitic capac-
itance and automatically recalibrated to compensate
for gradual environmental changes.
In addition, the CAP1296 can be configured to detect
proximity on one or more channels with an optional sig-
nal guard to reduce noise sensitivity and to isolate the
proximity antenna from nearby conductive surfaces
that would otherwise attenuate the e-field.
The CAP1296 includes Multiple Pattern Touch recogni-
tion that allows the user to select a specific set of but-
tons to be touched simultaneously. If this pattern is
detected, a status bit is set and an interrupt is gener-
ated.
The CAP1296 has Active and Standby states, each
with its own sensor input configuration controls. The
Combo state allows a combination of sensor input con-
trols to be used which enables one or more sensor
inputs to operate as buttons while another sensor input
is operating as a proximity detector. Power consump-
tion in the Standby and Combo states is dependent on
the number of sensor inputs enabled as well as averag-
ing, sampling time, and cycle time. Deep Sleep is the
lowest power state available, drawing 5µA (typical) of
current. In this state, no sensor inputs are active, and
communications will wake the device.
Applications
• Desktop and Notebook PCs
• LCD Monitors
• Consumer Electronics
• Appliances
Features
• Six (6) Capacitive Touch Sensor Inputs
- Programmable sensitivity
- Automatic recalibration
- Calibrates for parasitic capacitance
- Individual thresholds for each button
• Proximity Detection
• Signal Guard
- Isolates the proximity antenna from attenua-
tion
- Reduces system noise sensitivity effects on
inputs
• Multiple Button Pattern Detection
• Power Button Support
• Press and Hold Feature for Volume-like Applica-
tions
• 3.3V or 5V Supply
• Analog Filtering for System Noise Sources
• RF Detection and Avoidance Filters
• Digital EMI Blocker
• 8kV ESD Rating on All Pins (HBM)
• Low Power Operation
- 5µA quiescent current in Deep Sleep
- 50µA quiescent current in Standby (1 sensor
input monitored)
- Samples one or more channels in Standby
• SMBus / I2C Compliant Communication Interface
• Available in a 10-pin 3mm x 3mm DFN RoHS
compliant package
2013-2015 Microchip Technology Inc.
DS00001569B-page 1




CAP1296 pdf, 반도체, 판매, 대치품
CAP1296
1.0 INTRODUCTION
1.1 Block Diagram
FIGURE 1-1:
CAP1296 BLOCK DIAGRAM
VDD GND
CS3 /
SG
Capacitive Touch Sensing
Algorithm
SMBus
Protocol
CS1 CS2 CS4 CS5 CS6
1.2 Pin Diagrams
FIGURE 1-2:
CAP1296 14-PIN SOIC
N/C 1
CS1 2
ALERT# 3
SMDAT 4
SMCLK 5
N/C 6
VDD 7
14 N/C
13 CS2
12 CS3/SG
11 CS4
10 CS5
9 CS6
8 GND
SMCLK
SMDATA
ALERT#
DS00001569B-page 4
2013-2015 Microchip Technology Inc.

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CAP1296 전자부품, 판매, 대치품
CAP1296
2.0 ELECTRICAL SPECIFICATIONS
TABLE 2-1: ABSOLUTE MAXIMUM RATINGS
Voltage on VDD pin
Voltage on CS pins to GND
Voltage on 5V tolerant pins (V5VT_PIN)
Voltage on 5V tolerant pins (|V5VT_PIN - VDD|) (see Note 2-2)
Input current to any pin except VDD
Output short circuit current
Package Power Dissipation up to TA = 85°C for 10-pin DFN
(see Note 2-3)
Junction to Ambient (JA) (see Note 2-4)
Operating Ambient Temperature Range
Storage Temperature Range
ESD Rating, All Pins, HBM
-0.3 to 6.5
-0.3 to 4.0
-0.3 to 5.5
0 to 3.6
+10
Continuous
0.5
78
-40 to 125
-55 to 150
8000
V
V
V
V
mA
N/A
W
°C/W
°C
°C
V
Note 2-1
Note 2-2
Note 2-3
Note 2-4
Stresses above those listed could cause permanent damage to the device. This is a stress rating
only and functional operation of the device at any other condition above those indicated in the
operation sections of this specification is not implied.
For the 5V tolerant pins that have a pull-up resistor, the voltage difference between V5VT_PIN and VDD
must never exceed 3.6V.
The Package Power Dissipation specification assumes a recommended thermal via design consisting
of a 2x3 matrix of 0.3mm (12mil) vias at 0.9mm pitch connected to the ground plane with a 1.6 x
2.3mm thermal landing.
Junction to Ambient (JA) is dependent on the design of the thermal vias. Without thermal vias and
a thermal landing, the JA will be higher.
2013-2015 Microchip Technology Inc.
DS00001569B-page 7

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