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DSC2010 데이터시트 PDF




Micrel Semiconductor에서 제조한 전자 부품 DSC2010은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


 

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부품번호 DSC2010 기능
기능 Low-Jitter Configurable CMOS Oscillator
제조업체 Micrel Semiconductor
로고 Micrel Semiconductor 로고


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DSC2010 데이터시트, 핀배열, 회로
DSC2010
Low-Jitter Configurable CMOS Oscillator
General Description
The DSC2010 series of high performance
CMOS oscillators utilize a proven silicon
MEMS technology to provide excellent jitter
and stability while incorporating additional
device functionality. The DSC2010 allows
the user to easily modify the frequency and
drive strength of the oscillator using pins.
The DSC2010 has provision for up to four
user-defined pre-programmed, pin-selectable
output frequencies, and eight pin-selectable
output drive levels to help reduce EMI.
DSC2010 is packaged in a 14-pin 3.2x2.5
mm QFN package and available in
temperature grades from Ext. Commercial to
Automotive.
Block Diagram
Features
Low RMS Phase Jitter: <1 ps (typ)
High Stability: ±10, ±25, ±50 ppm
Wide Temperature Range
o Automotive: -55° to 125° C
o Ext. Industrial: -40° to 105° C
o Industrial: -40° to 85° C
o Ext. commercial: -20° to 70° C
High Supply Noise Rejection: -50 dBc
Pin-Selectable Configurations
o 3-bit Output Drive Strength
o 2-bit Output Frequency Combinations
Short Lead Times: 2 Weeks
Wide Freq. Range:
o CMOS Output: 2.3 to 170 MHz
Miniature Footprint of 3.2x2.5mm
Excellent Shock & Vibration Immunity
o Qualified to MIL-STD-883
High Reliability
o 20x better MTF than quartz oscillators
Supply Range of 2.25 to 3.6 V
Lead Free & RoHS Compliant
Applications
Consumer Electronics
Storage Area Networks
o SATA, SAS, Fibre Channel
Passive Optical Networks
o EPON, 10G-EPON, GPON, 10G-PON
Ethernet
o 1G, 10GBASE-T/KR/LR/SR, and FCoE
HD/SD/SDI Video & Surveillance
PCI Express
_____________________________________________________________________________________________________________________________ _________________
DSC2010
Page 1
MK-Q-B-P-D-12042601-2




DSC2010 pdf, 반도체, 판매, 대치품
DSC2010
Low-Jitter Configurable CMOS Oscillator
Absolute Maximum Ratings
Ordering Code
Item
Min Max Unit
Supply Voltage -0.3 +4.0
V
Input Voltage
Junction Temp
-0.3 VDD+0.3
- +150
V
°C
Storage Temp -55 +150
°C
Soldering Temp -
+260
°C
ESD
-
HBM
4000
MM 400
CDM
1500
Note: 1000+ years of data retention on internal memory
V
Condition
40sec max.
Temp Range
E: -20 to 70
I: -40 to 85
L: -40 to 105
M: -55 to 125
Packing
T: Tape & Reel
: Tube
DSC2010 F I 2 - xxxxx
T
Package
F: 3.2x2.5mm
Stability
1: ±50ppm
2: ±25ppm
5: ±10ppm
Freq (MHz)
See Freq. table
Specifications (Unless specified otherwise: T=25° C, max CMOS drive strength)
Parameter
Supply Voltage1
Supply Current
Frequency Stability
Aging
Startup Time2
Input Logic Levels
Input logic high
Input logic low
Output Disable Time3
Output Enable Time
Pull-Up Resistor4
Condition
VDD
IDD EN pin low output is disabled
Includes frequency variations due
Δf to initial tolerance, temp. and
power supply voltage
Δf 1 year @25°C
tSU T=25°C
VIH
VIL
tDA
tEN
Pull-up exists on all digital IO
Supply Current4
Output Logic Levels
Output logic high
Output logic low
Output Transition time3
Rise Time
Fall Time
Frequency
Output Duty Cycle
CMOS Output
IDD
EN pin high output is enabled
CL=15pF, FO=125 MHz
VOH
VOL
tR
tF
f0
SYM
I=±6mA
20% to 80%
CL=15pf
Commercial/Industrial temp range
Automotive temp range
Period Jitter
JPER
FO=125 MHz
200kHz to 20MHz @ 125MHz
Integrated Phase Noise
JCC 100kHz to 20MHz @ 125MHz
12kHz to 20MHz @ 125MHz
Notes:
1.
2.
3.
4.
Pin 4 VDD should be filtered with 0.01uf capacitor.
tsu is time to 100PPM stable output frequency after VDD is applied and outputs are enabled.
Output Waveform and Test Circuit figures below define the parameters.
Output is enabled if Enable pad is floated or not connected.
Min.
2.25
0.75xVDD
-
0.9xVDD
-
2.3
45
Typ.
21
40
31
1.1
1.3
3
0.3
0.38
1.7
Max.
3.6
23
±10
±25
±50
±5
5
Unit
V
mA
ppm
ppm
ms
-
0.25xVDD
5
20
V
ns
ns
kΩ
35 mA
-
0.1xVDD
V
2
2
170
100
55
ns
MHz
%
psRMS
psRMS
2
_____________________________________________________________________________________________________________________________ _________________
DSC2010
Page 4
MK-Q-B-P-D-12042601-2

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