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PDF DSC2133 Data sheet ( Hoja de datos )

Número de pieza DSC2133
Descripción SPI Programmable Dual LVDS Oscillator
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DSC2133 DSC2233
Low-Jitter I2C/SPI Programmable Dual LVDS Oscillator
Datasheet
General Description
The DSC2133 and DSC2233 series of
programmable, high-performance dual LVDS
oscillators utilizes a proven silicon MEMS
technology to provide excellent jitter and
stability while incorporating high output
frequency flexibility. DSC2133 and DSC2233
allow the user to independently modify the
frequency of each output using I2C or SPI
interface, respectively. User can also select
from two pre-programmed default output
frequencies using the control pin.
DSC2133 and DSC2233 are packaged in 14-
pin 3.2x2.5 mm QFN package and available
in temperature grades from Ext. Commercial
to Industrial.
Block Diagram
Features
Low RMS Phase Jitter: <1 ps (typ)
High Stability: ±25, ±50 ppm
Wide Temperature Range
o Industrial: -40° to 85° C
o Ext. commercial: -20° to 70° C
High Supply Noise Rejection: -50 dBc
Two Independent LVDS Outputs
I2C/SPI Programmable Frequencies
Short Lead Times: 2 Weeks
Wide Frequency Range:
o LVDS Output: 2.3 to 460 MHz
Miniature Footprint of 3.2x2.5mm
Excellent Shock & Vibration Immunity
o Qualified to MIL-STD-883
High Reliability
o 20x better MTF than quartz oscillators
Supply Range of 2.25 to 3.6 V
Lead Free & RoHS Compliant
Pin #
3
5
6
7
DSC2133 (I2C)
NC
SDA
SCL
CS_bar
DSC2233 (SPI)
SCLK
MOSI
MISO
SS
Applications
Storage Area Networks
o SATA, SAS, Fibre Channel
Passive Optical Networks
o EPON, 10G-EPON, GPON, 10G-PON
Ethernet
o 1G, 10GBASE-T/KR/LR/SR, and FCoE
HD/SD/SDI Video & Surveillance
PCI Express
_____________________________________________________________________________________________________________________________ _________________
DSC2133 DSC2233
Page 1
MK-Q-B-P-D-12050109

1 page




DSC2133 pdf
DSC2133 DSC2233 Low-Jitter I2C/SPI Programmable Dual LVDS Oscillator
Nominal Performance Parameters (Unless specified otherwise: T=25° C, VDD=3.3 V)
2.5
156MHz-LVDS
2.0 212MHz-LVDS
320MHz-LVDS
1.5 410MHz-LVDS
1.0
0.5
0.0
0
200 400 600 800 1000
Low-end of integration BW: x kHz to 20 MHz
LVDS Phase jitter (integrated phase noise)
Output Waveform: LVDS
tR
Output
Output
80%
50%
20%
tF
1/f o
Enable
VIL
tEN
tDA
VIH
385300 mmvV
_____________________________________________________________________________________________________________________________ _________________
DSC2133 DSC2233
Page 5
MK-Q-B-P-D-12050109

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