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MAX261 데이터시트 PDF




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부품번호 MAX261 기능
기능 Microprocessor Programmable Universal Active Filters
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MAX261 데이터시트, 핀배열, 회로
19-0352; Rev 2; 7/02
Microprocessor Programmable
Universal Active Filters
General Description
The MAX260/MAX261/MAX262 CMOS dual second-
order universal switched-capacitor active filters allow
microprocessor control of precise filter functions. No
external components are required for a variety of band-
pass, lowpass, highpass, notch, and allpass configura-
tions. Each device contains two second-order filter
sections that place center frequency, Q, and filter oper-
ating mode under programmed control.
An input clock, along with a 6-bit f0 program input,
determine the filter's center or corner frequency without
affecting other filter parameters. The filter Q is also pro-
grammed independently. Separate clock inputs for
each filter section operate with either a crystal, RC net-
work, or external clock generator.
The MAX260 has offset and DC specifications superior
to the MAX261 and MAX262 and a center frequency
(f0) range of 7.5kHz. The MAX261 handles center fre-
quencies to 57kHz, while the MAX262 extends the cen-
ter frequency range to 140kHz by employing lower
clock-to-f0 ratios. All devices are available in 24-pin DIP
and small outline packages in commercial, extended,
and military temperature ranges.
Applications
µP-Tuned Filters
Anti-Aliasing Filters
Digital Signal Processing
Adaptive Filters
Signal Analysis
Phase-Locked Loops
Functional Diagram
INPUT
+5V V+
IN LP HP BP
FILTER
A
OUTPUT
IN LP HP BP
FILTER
B
GND
MAX260
-5V V- MAX261
MAX262
CLKA OSC CLKOUT
CLKB
CRYSTAL
PROGRAM
INPUTS
FOURTH-ORDER BANDPASS FILTER
Features
o Filter Design Software Available
o Microprocessor Interface
o 64-Step Center Frequency Control
o 128-Step Q Control
o Independent Q and f0 Programming
o Guaranteed Clock to f0 Ratio-1% (A grade)
o 75kHz f0 Range (MAX262)
o Single +5V and ±5V Operation
Ordering Information
PART
TEMP RANGE PACKAGE ACCURACY
MAX260ACNG 0°C to +70°C Plastic DIP
1%
MAX260BCNG 0°C to +70°C Plastic DIP
2%
MAX260AENG -40°C to +85°C Plastic DIP
1%
MAX260BENG -40°C to +85°C Plastic DIP
2%
MAX260ACWG 0°C to +70°C Wide SO
1%
MAX260BCWG 0°C to +70°C Wide SO
2%
MAX260AMRG -55°C to +125°C CERDIP
1%
MAX260BMRG -55°C to +125°C CERDIP
2%
*All devices—24-pin packages 0.3in-wide packages
Ordering Information continued at end of data sheet.
Pin Configurations
TOP VIEW
BPA 1
N.C. 2
HPA 3
N.C. 4
INA 5
D1 6
A3 7
CLK OUT 8
V+ 9
A2 10
CLKA 11
CLKB 12
MAX260
24 LPA
BPA 1
23 INB
22 LPB
OP OUT 2
HPA 3
21 BPB
OP IN 4
20 D0
19 OSC OUT
INA 5
D1 6
18 GND
17 V-
A3 7
CLK OUT 8
16 WR
V+ 9
15 A0
A2 10
14 HPB
CLKA 11
13 A1
CLKB 12
MAX261
MAX262
24 LPA
23 INB
22 LPB
21 BPB
20 HPB
19 D0
18 OSC OUT
17 GND
16 V-
15 WR
14 A0
13 A1
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.




MAX261 pdf, 반도체, 판매, 대치품
Microprocessor Programmable
Universal Active Filters
ELECTRICAL CHARACTERISTICS (for V± = ±2.5V ±5%)
(V+ = +2.37V, V- = -2.37V, CLKA = CLKB = ±2.5V 250kHz for the MAX260 and 1MHz for the MAX261/MAX262, fCLK/f0 = 199.49 for
MAX260/MAX261 and 139.80 for MAX262, Filter Mode 1, TA = +25°C, unless otherwise noted.)
PARAMETER
CONDITIONS
MIN TYP MAX UNITS
f0 Center Frequency Range
Maximum Clock Frequency
(Note 7)
(Note 7)
fCLK/f0 Ratio Error
(Notes 1, 8)
Q=8
MAX26XA
MAX26XB
±0.1
±0.1
1
2
%
Q Accuracy (deviation from ideal
continuous filter)
(Notes 2, 8)
Q=8
fCLK/f0 = 199.49
fCLK/f0 = 199.49
fCLK/f0 = 139.80
MAX260A
MAX260B
MAX261A
MAX261B
MAX262A
MAX262B
±2 ±6
±2 ±10
±2 ±6
±2 ±10
±2 ±6
±2 ±10
%
Output Signal Swing
All Outputs (Note 6)
±2 V
Power Supply Current
CMOS Level Logic Inputs (Note 5)
7 mA
Shutdown Current
CMOS Level Logic Inputs (Note 5)
0.35 mA
Note 1: fCLK/f0 accuracy is tested at 199.49 on the MAX260/MAX261, and at 139.8 on the MAX262.
Note 2: Q accuracy tested at Q = 8, 32, and 64. Q of 32 and 64 tested at 1/2 stated clock frequency.
Note 3: The offset voltage is specified for the entire filter. Offset is virtually independent of Q and fCLK/f0 ratio setting. The test clock
frequency for mode 3 is 175kHz for the MAX260 and 750kHz for the MAX261/MAX262.
Note 4: Output noise is measured with an RC output smoothing filter at 4 f0 to remove clock feedthrough.
Note 5: TTL logic levels are: HIGH = 2.4V, LOW = 0.8V. CMOS logic levels are: HIGH = 5V, LOW = 0V. Power supply current is typi-
cally 4mA higher with TTL logic and clock input levels.
Note 6: On the MAX260 only, the HP output signal swing is typically 0.75V less than the LP or BP outputs.
Note 7: At ±2.5V supplies, the f0 range and maximum clock frequency are typically 75% of values listed in Table 1.
Note 8: fCLK/f0 and Q accuracy are a function of the accuracy of internal capacitor ratios. No increase in error is expected at ±2.5V
as compared to ±5V; however, these parameters are only tested to the extent indicated by the MIN or MAX limits.
INTERFACE SPECIFICATIONS (Note 9)
(V+ = +5V, V+ = -5V, TA = +25°C, unless otherwise noted.)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
WR Pulse Width
Address Setup
Address Hold
Data Setup
Data Hold
tWR
tAS
tAH
tDS
tDH
250 150
25
0
100 50
10 0
ns
ns
ns
ns
ns
Logic Input High
VIH
WR, D0, D1, A0A3, CLKA, CLKB
TA =TMIN to TMAX
2.4
V
Logic Input Low
VIL
WR, D0, D1, A0A3, CLKA, CLKB
TA =TMIN to TMAX
0.8 V
Input Leakage Current
WR, D0, D1, A0A3, CLKB
IIN CLKA
TA =TMIN to TMAX
10
6 60 µA
Input Capacitance
CIN WR, D0, D1, A0A3, CLKA, CLKB
15 pF
Note 9: Interface timing specifications are guaranteed by design and are not subject to test.
4 _______________________________________________________________________________________

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MAX261 전자부품, 판매, 대치품
Microprocessor Programmable
Universal Active Filters
SCN = SWITCH-CAPACITOR NETWORK
SCN
IN SCN
-
+
S1 S2 S3
S1
-
+Σ
-
S2
SAMPLE-HOLD
MAX260 ONLY
S-H
∫∫
N/HP/AP
BP
LP
MODE
SELECT
M0 M1
SCN
SCN
S3
Q0–Q6
(TABLE 3)
F0–F5
(TABLE 2)
Figure 1. Filter Block Diagram (One Second-Order Section)
Introduction
Each MAX260/MAX261/MAX262 contains two second-
order switched-capacitor active filters. Figure 1 shows
the filter's state variable topology, employed with two
cascaded integrators and one summing amplifier. The
MAX261 and MAX262 also contain an uncommitted
amplifier. On-chip switches and capacitors provide
feedback to-control each filter section's f0 and Q.
Internal capacitor ratios are primarily responsible for
the accuracy of these parameters. Although these
switched-capacitor networks (SCN) are in fact sampled
systems, their behavior very closely matches that of
continuous filters, such as RC active filters. The ratio of
the clock frequency to the filter center frequency
(fCLK/f0) is kept large so that ideal second-order state-
variable response is maintained.
The MAX262 uses a lower range of sampling (fCLK/f0)
ratios than the MAX260 or MAX261 to allow higher
operating f0 frequencies and signal bandwidths. These
reduced sample rates result in somewhat more devia-
tion from ideal continuous filter parameters than with
the MAX260/MAX261. However, these differences can
be compensated using Figure 20 (see Application
Hints) or Maxim's filter design software.
The MAX260 employs auto-zero circuitry not included
in the MAX261 or MAX262. This provides improved DC
characteristics, and improved low-frequency perform-
ance at the expense of high-end f0 and signal band-
width. The N/HP/AP outputs of the MAX260 are internal-
ly sample-and-held as a result of its auto-zero
operation. Signal swing at this output is somewhat
reduced as a result (MAX260 only). See Table 1 for
bandwidth comparisons of the three filters.
Maxim also provides design programs that aid in con-
verting filter response specifications into the f0 and Q
program codes used by the MAX260 series devices.
This software also precompensates f0 and Q when low
sample rates are used.
It is important to note that, in all MAX260 series filters,
the filter's internal sample rate is one half the input
clock rate (CLKA or CLKB) due to an internal division
by two. All clock-related data, tables, and other dis-
cussions in this data sheet refer to the frequency at the
CLKA or CLKB input, i.e., twice the internal sample rate,
unless specifically stated otherwise.
Quick Look Design Procedure
The MAX260, MAX261, and MAX262, with Maxim's filter
design software, greatly simplify the design procedures
for many active filters. Most designs can be realized
using a three-step process described in this section. If
the design software is not used, or if the filter complexi-
ty is beyond the scope of this section, refer to the
remainder of this data sheet for more detailed applica-
tions and design information.
_______________________________________________________________________________________ 7

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