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Número de pieza MCP3910
Descripción 3V Two-Channel Analog Front End
Fabricantes Microchip 
Logotipo Microchip Logotipo



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MCP3910
3V Two-Channel Analog Front End
Features:
• Two Synchronous Sampling 24-bit Resolution
Delta-Sigma A/D Converters
• 93.5 dB SINAD, -107 dBc Total Harmonic
Distortion (THD) (up to 35th harmonic), 112 dB
Spurious-Free Dynamic Range (SFDR) for Each
Channel
• Flexible Serial Interface that Includes Both SPI
and a Simple 2-Wire Interface Ideal for Polyphase
Shunt Energy Meters
• Enables 0.1% Typical Active Power Measurement
Error over a 10,000:1 Dynamic Range
• Advanced Security Features:
- 16-bit Cyclic Redundancy Check (CRC)
Checksum on All Communications for Secure
Data Transfers
- 16-bit Cyclic Redundancy Check (CRC)
Checksum and Interrupt Alert for Register-
Map Configuration
- Register-Map Lock with 8-bit Secure Key
• 2.7V – 3.6V AVDD, DVDD
• Programmable Data Rate, up to 125 ksps:
- 4 MHz Maximum Sampling Frequency
- 16 MHz Maximum Master Clock
• Oversampling Ratio, up to 4096
• Ultra Low-Power Shutdown Mode with < 10 µA
• -122 dB Crosstalk between Channels
• Low Drift 1.2V Internal Voltage Reference:
9 ppm/°C
• Differential Voltage Reference Input Pins
• High-Gain Programmable Gain Amplifier (PGA)
on Each Channel (up to 32 V/V)
• Phase Delay Compensation with 1 µs Time
Resolution
• Separate Data Ready Pin for Easy
Synchronization
• Individual 24-bit Digital Offset and Gain Error
Correction for Each Channel
• High-Speed 20 MHz SPI Interface with Mode 0,0
and 1,1 Compatibility
• Continuous Read/Write Modes for Minimum
Communication with Dedicated 16-/32-bit Modes
• Available in 20-lead QFN and SSOP Packages
• Extended Temperature Range: -40°C to +125°C
(All Specifications are Valid Down to -45°C
Operation)
Description:
The MCP3910 is a 3V two-channel Analog Front End
(AFE), containing two synchronous sampling delta-
sigma, Analog-to-Digital Converters (ADC), two
programmable gain amplifiers (PGA), phase delay
compensation block, low-drift internal voltage
reference, digital offset and gain errors calibration
registers, and high-speed 20 MHz SPI-compatible
serial interface.
The MCP3910 ADCs are fully configurable with
features such as: 16-/24-bit resolution, Oversampling
Ration (OSR) from 32 to 4096, gain from 1x to 32x,
independent Shutdown and Reset, dithering and auto-
zeroing. Communication is largely simplified with 8-bit
commands, including various continuous read/write
modes and 16-/24-/32-bit data formats that can be
accessed by the Direct Memory Access (DMA) of an
8-/16- or 32-bit MCU, and with the separate data ready
pin that can directly be connected to an Interrupt
Request (IRQ) input of an MCU.
The MCP3910 includes advanced security features to
secure the communications and the configuration
settings, such as a CRC-16 checksum on both serial
data outputs and on the static register map
configuration. It also includes a register-map lock
through an 8-bit password to stop unwanted write
commands from processing.
For polyphase shunt-based energy meters, the
MCP3910 2-Wire serial interface greatly reduces
system cost, requiring only a single bidirectional
isolator per phase.
The MCP3910 is capable of interfacing a variety of
voltage and current sensors, including shunts, current
transformers, Rogowski coils and Hall-effect sensors.
Applications:
• Single-Phase and Polyphase Energy Meters
• Energy Metering and Power Measurement
• Automotive
• Portable Instrumentation
• Medical and Power Monitoring
• Audio/Voice Recognition
• Isolated Sensor Applications
2012-2014 Microchip Technology Inc.
DS20005116B-page 1

1 page




MCP3910 pdf
MCP3910
TABLE 1-1: ANALOG SPECIFICATIONS (CONTINUED)
Electrical Specifications: Unless otherwise indicated, all parameters apply at AVDD = DVDD = 3V, MCLK = 4 MHz;
PRE<1:0> = 00; OSR = 256; GAIN = 1; VREFEXT = 0, CLKEXT = 1, DITHER<1:0> = 11; BOOST<1:0> = 10, VCM = 0V;
TA = -40°C to +125°C (Note 1); VIN = 1.2 VPP = -0.5 dBFS @ 50/60 Hz on all channels.
Characteristic
Sym.
Min. Typ. Max. Units
Conditions
Internal Voltage Reference
Tolerance
Temperature Coefficient
VREF
TCVREF
1.176 1.2 1.224
V VREFEXT = 0,
TA = +25°C only
— 9 — ppm/°C TA = -45°C to +125°C,
VREFEXT = 0
Output Impedance
ZOUTVREF
0.6
Internal Voltage Reference AIDDVREF
54
Operating Current
kVREFEXT = 0
µA VREFEXT = 0,
SHUTDOWN<1:0> = 11
Voltage Reference Input
Input Capacitance
— — 10
pF
Differential Input Voltage
Range (VREF+ – VREF-)
Absolute Voltage on
REFIN+ pin
VREF
1.1 — 1.3
V VREFEXT = 1
VREF+ VREF- + 1.1 VREF- + 1.3 V VREFEXT = 1
Absolute Voltage
REFIN- pin
Master Clock Input
VREF-
-0.1 — +0.1
V REFIN- should be connected
to AGND when VREFEXT = 0
Master Clock Input
Frequency Range
fMCLK
— 20 MHz CLKEXT = 1 (Note 7)
Crystal Oscillator Operat-
ing Frequency Range
fXTAL
1 — 20 MHz CLKEXT = 0 (Note 7)
Analog Master Clock
AMCLK
— — 16 MHz Note 7
Crystal Oscillator
Operating Current
DIDDXTAL
80
µA CLKEXT = 0
Power Supply
Operating Voltage, Analog
Operating Voltage, Digital
Operating Current, Analog
(Note 3)
AVDD
DVDD
IDD,A
2.7 — 3.6
V
2.7 — 3.6
V
— 1.5 1.95 mA BOOST<1:0> = 00
— 1.8 2.3
mA BOOST<1:0> = 01
— 2.5 3.2
mA BOOST<1:0> = 10
— 4.4 5.5
mA BOOST<1:0> = 11
Note 1: All specifications are valid down to -45°C operation.
2: This specification implies that the ADC output is valid over this entire differential range and that there is no distortion or
instability across this input range. Dynamic Performance specified at -0.5 dB below the maximum signal range,
VIN = 1.2 VPP = 424 mVRMS, VREF = 1.2V @ 50/60 Hz. See Section 4.0 “Terminology And Formulas” for definition.
This parameter is established by characterization and not 100% tested.
3: For these operating currents, the following configuration bit settings apply: SHUTDOWN<1:0> = 00, RESET<1:0> =
00, VREFEXT = 0, CLKEXT = 0.
4: For these operating currents, the following configuration bit settings apply: SHUTDOWN<1:0> = 11, VREFEXT = 1,
CLKEXT = 1.
5: Applies to all gains. Offset and gain errors depend on PGA gain setting. See Section 2.0 “Typical Performance
Curves” for typical performance.
6: Outside this range, the ADC accuracy is not specified. An extended input range of +/-2V can be applied continuously to
the part, with no damage.
7: For proper operation and for optimizing the ADC accuracy, AMCLK should be limited to the maximum frequency
defined in Table 5-2, as a function of the BOOST and PGA setting chosen. MCLK can take larger values as long as the
prescaler settings (PRE<1:0>) limit AMCLK = MCLK/PRESCALE within the defined range in Table 5-2.
2012-2014 Microchip Technology Inc.
DS20005116B-page 5

5 Page





MCP3910 arduino
MCP3910
2.0 TYPICAL PERFORMANCE CURVES
Note:
The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Note: Unless otherwise indicated, AVDD = 3V, DVDD = 3V; TA = +25°C, MCLK = 4 MHz; PRESCALE = 1;
OSR = 256; GAIN = 1; Dithering = Maximum; VIN = -0.5 dBFS @ 60 Hz on all channels, VREFEXT = 0; CLKEXT = 1;
BOOST<1:0> = 10.
0
-20
-40
-60
-80
-100
-120
-140
-160
-180
0
Vin = -0.5 dBFS @ 60 Hz
fD = 3.9 ksps
OSR = 256
Dithering = Off
16 ksamples FFT
500
1000
1500
Frequency (Hz)
2000
FIGURE 2-1:
Spectral Response.
0
-20
-40
-60
-80
-100
-120
-140
-160
-180
0
FIGURE 2-2:
Vin = -60 dBFS @ 60 Hz
fD = 3.9 ksps
OSR = 256
Dithering = Off
16 ksamples FFT
500
1000
1500
Frequency (Hz)
Spectral Response.
2000
0
-20
-40
-60
-80
-100
-120
-140
-160
-180
0
FIGURE 2-3:
Vin = -0.5 dBFS @ 60 Hz
fD = 3.9 ksps
OSR = 256
Dithering = Maximum
16 ksamples FFT
500
1000
1500
Frequency (Hz)
Spectral Response.
2000
0
-20
-40
-60
-80
-100
-120
-140
-160
-180
0
Vin = -60 dBFS @ 60 Hz
fD = 3.9 ksps
OSR = 256
Dithering = Maximum
16 ksamples FFT
500
1000
1500
Frequency (Hz)
2000
FIGURE 2-4:
Spectral Response.
1.0%
0.5%
0.0%
% Error Channel 0, 1
-0.5%
-1.0%
0.01 0.1 1 10 100 1000
Current Channel Input Amplitude (mVPeak)
FIGURE 2-5:
Measurement Error
with 1-Point Calibration.
1.0%
0.5%
0.0%
% Error Channel 0, 1
-0.5%
-1.0%
0.01 0.1 1 10 100 1000
Current Channel Input Amplitude (mVPeak)
FIGURE 2-6:
Measurement Error
with 2-Point Calibration.
2012-2014 Microchip Technology Inc.
DS20005116B-page 11

11 Page







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