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PDF PTFB211501F Data sheet ( Hoja de datos )

Número de pieza PTFB211501F
Descripción Thermally-Enhanced High Power RF LDMOS FETs
Fabricantes Infineon 
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PTFB211501E
PTFB211501F
Thermally-Enhanced High Power RF LDMOS FETs
150 W, 2110 – 2170 MHz
Description
The PTFB211501E and PTFB211501F are thermally-enhanced,
150-watt, LDMOS FETs designed for cellular power amplifier
applications in the 2110 – 2170 frequency band. Features include
I/O matching, high gain, and thermally-enhanced ceramic open-cavity
packages with slotted and earless flanges.
PTFB211501E
Package H-36248-2
PTFB211501F
Package H-37248-2
Single-carrier WCDMA Drive Up
VDD = 30 V, IDQ = 1.20 A, ƒ = 2170 MHz
3GPP WCDMA, PAR = 8.5 dB, BW 3.84 MHz
-25 60
-30 50
-35
Efficiency
40
-40 30
-45 ACP Low
20
-50 10
ACP Up
-55 0
31 33 35 37 39 41 43 45 47 49
Output Power (dBm)
Features
• Broadband internal matching
• Typical single-carrier WCDMA performance at
2170 MHz, 30 V, IDQ = 1.2 A, 3GPP signal, channel
bandwidth = 3.84 MHz, PAR = 8.5 dB @ 0.01%
CCDF
- Average output power = 40 W
- Linear Gain = 18 dB
- Efficiency = 32%
- Adjacent channel power = –34 dBc
• Typical CW performance, 2170 MHz, 30 V
- Output power at P–1dB = 150 W
- Efficiency = 55%
• Integrated ESD protection: Human Body Model,
Class 2 (minimum)
• Capable of handling 10:1 VSWR @ 30 V,
150 W (CW) output power
• Pb-Free and RoHS compliant
RF Characteristics
Single-carrier WCDMA Measurements (tested in Infineon test fixture)
VDD = 30 V, IDQ = 1.2 A, POUT = 40 W AVG, ƒ = 2170 MHz, 3GPP signal, channel bandwidth = 3.84 MHz, peak/average = 8.5 dB
@ 0.01% CCDF
Characteristic
Symbol Min Typ Max Unit
Gain
Gps
17 18
dB
Drain Efficiency
ηD
27 32
%
Intermodulation Distortion
IMD — –34 –32 dBc
All published data at TCASE = 25°C unless otherwise indicated
*See Infineon distributor for future availability.
ESD: Electrostatic discharge sensitive device—observe handling precautions!
Data Sheet
1 of 13
Rev. 03.1, 2016-06-14

1 page




PTFB211501F pdf
Typical Performance (cont.)
Intermodulation Distortion
vs. Output Power
VDD = 30 V, IDQ = 1.20 A,
ƒ1 = 2170 MHz, ƒ2 = 2169 MHz
-20
3rd Order
-30 5th
-40
-50 7th
-60
40
45 50
Output Power, PEP (dBm)
55
PTFB211501E
PTFB211501F
Bias Voltage vs. Temperature
Voltage normalized to typical gate voltage,
series show current
1.03
1.02
1.01
1
0.99
0.98
0.97
-20
2A
4A
8A
10 A
12 A
14 A
16 A
0 20 40 60 80
Case Temperature (°C)
100
Broadband Circuit Impedance
Z Source
D
Z Load
G
S
Frequency
MHz
2200
2170
2140
2110
2080
Z Source
R jX
4.29
–8.14
4.36
–8.34
4.45
–8.53
4.55
–8.74
4.67
–8.95
Data Sheet
Z Load
R jX
1.49
–4.39
1.52
–4.50
1.55
–4.61
1.58
–4.72
1.62
–4.84
5 of 13
Z0 = 50
Z Load
0.1
2200 MHz
2080 MHz
Z Source
0. 2
0.3
Rev. 03.1, 2016-06-14

5 Page





PTFB211501F arduino
PTFB211501E
PTFB211501F
Package Outline Specifications
Package H-36248-2
45° X 2.720
[45° X .107]
CL
D
FLANGE 9.779
[.385]
[ ]19.431±0.510
LID 9.398+-00.1.15000
.370+-00.0.00064
[.765±0.020]
1.016
[.040]
G
2X 12.700
[.500]
27.940
[1.100]
19.812±0.200
[.780±0.008]
0.0381 [.0015] -A-
CL
34.036
[1.340]
4.826±0.510
[.190±0.020]
S
CL
2X R1.626
[R.064]
4X R1.524
[R.060]
C66065-A2322-C001-01-0027_h-36248-2_11-11-09
SPH 1.575
[.062]
3.632±0.380
Diagram Notes—unless otherwise specified:
1. Interpret dimensions and tolerances per ASME Y14.5M-1994.
2. Primary dimensions are mm. Alternate dimensions are inches.
3. All tolerances ± 0.127 [.005] unless specified otherwise.
4. Pins: D drain; S source; G gate.
5. Lead thickness: 0.102 +0.051/–0.025 [0.004 +0.002/–0.001].
6. Gold plating thickness: 1.14 ± 0.38 micron [45 ± 15 microinch] max.
Data Sheet
11 of 13
Rev. 03.1, 2016-06-14

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