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Número de pieza | PTVA104501EH | |
Descripción | Thermally-Enhanced High Power RF LDMOS FET | |
Fabricantes | Infineon | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de PTVA104501EH (archivo pdf) en la parte inferior de esta página. Total 9 Páginas | ||
No Preview Available ! PTVA104501EH
Thermally-Enhanced High Power RF LDMOS FET
450 W, 50 V, 960 – 1215 MHz
Description
The PTVA104501EH LDMOS FET is designed for use in power ampli-
fier applications in the 960 to 1215 MHz frequency band. Features
include high gain and thermally-enhanced package with bolt-down
flange. Manufactured with Infineon's advanced LDMOS process, this
device provides excellent thermal performance and superior reliability.
PTVA104501EH
Package H-33288-2
Power Sweep, Pulsed RF
VDD = 50 V, IDQ = 200 mA, TCASE = 25°C,
128 µs pulse width, 10% duty cycle
65
Output power
Efficiency
55
65
55
45 45
35
960 MHz
35
1030 Mhz
25 1090 MHz 25
1150 MHz
1215 MHz
15
a104501eh_g1
15
28 30 32 34 36 38 40 42 44
PIN (dBm)
Features
• Broadband internal input and output matching
• High gain and efficiency
• Integrated ESD protection
• Human Body Model Class 2 (per ANSI/ESDA/
JEDEC JS-001)
• Low thermal resistance
• Excellent ruggedness
• Pb-free and RoHS compliant
• Capable of withstanding a 10:1 load mismatch
(all phase angles) at 450 W peak under RF pulse,
128 µS, 10% duty cycle.
RF Characteristics
Pulsed RF Performance (tested in Infineon test fixture) (tested in Infineon test fixture)
VDD = 50 V, IDQ = 200 mA, POUT = 450 W (peak), ƒ1 = 960 MHz, ƒ2 = 1090 MHz, ƒ3 = 1215 MHz, RF pulse 128 µs,
10% duty cycle
Characteristic
Gain
Drain Efficiency
Gain Flatness
Return Loss
Symbol
Gps
hD
DG
IRL
Min
16.5
53
—
—
Typ
17.5
58
0.85
–9.5
Max
—
—
1.8
–6
Unit
dB
%
dB
dB
All published data at TCASE = 25°C unless otherwise indicated
ESD: Electrostatic discharge sensitive device—observe handling precautions!
Data Sheet
1 of 9
Rev. 02.1, 2016-04-19
1 page PTVA104501EH
Broadband Circuit Impedance
Freq
[MHz]
960
1030
1090
1150
1215
Z Source W
R jX
2.04 –0.30
1.71 –0.18
1.45 0.09
1.23 0.41
1.07 0.77
Z Load W
R jX
0.79 –0.02
0.73 0.64
0.95 1.09
1.26 0.98
0.71 0.93
Z Source
D
Z Load
G
S
Load Pull Performance
Load Pull at Max POUT Point – 16 µs pulse width, 10% duty cycle, class AB, VDD = 50 V, 200 mA
Freq
Zl
PIN
POUT
POUT
PG PAE Eff
[MHz]
[W]
[dBm]
[dBm]
[W]
[dB]
[%]
960
1.35 – j0.70
43.30
57.83
606.74
14.53
54.90
1030
0.99 – j0.78
42.14
57.62
578.10
15.48
50.96
1090
1.24 – j0.84
41.37
57.40
549.54
16.03
50.52
1215
1.56 – j0.99
39.24
56.92
492.04
17.68
48.12
Load Pull at Max GT Point – 16 µs pulse width, 10% duty cycle, class AB, VDD = 50 V, 200 mA
Freq
Zl
PIN
POUT
POUT
PG
[MHz]
[W]
[dBm]
[dBm]
[W]
[dB]
960
1.35 – j0.70
40.10
55.70
371.54
15.60
1030
0.99 – j0.78
38.16
55.33
341.19
17.17
1090
1.24 – j0.84
36.05
54.14
259.42
18.09
1215
1.56 – j0.99
33.38
53.42
219.79
20.04
PAE Eff
[%]
58.76
59.44
56.31
49.44
Load Pull at Max Efficiency Point – 16 µs pulse width, 10% duty cycle, class AB, VDD = 50 V, 200 mA
Freq
Zl
PIN
POUT
POUT
PG PAE Eff
[MHz]
[W]
[dBm]
[dBm]
[W]
[dB]
[%]
960
1.35 – j0.70
42.00
57.27
533.33
15.27
62.15
1030
0.99 – j0.78
39.44
56.34
430.53
16.90
61.78
1090
1.24 – j0.84
37.54
55.36
343.56
17.82
59.60
1215
1.56 – j0.99
36.19
55.58
361.41
19.39
56.63
Z Optimum – 16 µs pulse width, 10% duty cycle, class AB, VDD = 50 V, 200 mA
Freq
Zl
PIN
POUT
POUT
[MHz]
[W]
[dBm]
[dBm]
[W]
960
1.35 – j0.70
42.62
57.62
578.10
1030
0.99 – j0.78
39.82
56.62
459.20
1090
1.24 – j0.84
38.71
56.21
417.83
1215
1.56 – j0.99
37.79
56.47
443.61
PG
[dB]
15.00
16.80
17.50
18.68
PAE Eff
[%]
60.03
61.39
58.60
53.43
ZOUT
[W]
1.29 – j1.37
1.02 – j1.43
1.06 – j1.51
1.13 – j1.66
ZOUT
[W]
2.15 – j2.60
2.73 – j2.02
3.55 – j0.42
1.34 – j0.08
ZOUT
[W]
1.60 – j1.79
2.27 – j1.50
2.72 – j1.29
1.65 – j0.92
ZOUT
[W]
1.50 – j1.61
2.03 – j1.45
2.02 – j1.38
1.29 – j1.37
Data Sheet
5 of 9
Rev. 02.1, 2016-04-19
5 Page |
Páginas | Total 9 Páginas | |
PDF Descargar | [ Datasheet PTVA104501EH.PDF ] |
Número de pieza | Descripción | Fabricantes |
PTVA104501EH | Thermally-Enhanced High Power RF LDMOS FET | Infineon |
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