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PXAC260602FC 데이터시트 PDF




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부품번호 PXAC260602FC 기능
기능 Thermally-Enhanced High Power RF LDMOS FET
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PXAC260602FC 데이터시트, 핀배열, 회로
PXAC260602FC
Thermally-Enhanced High Power RF LDMOS FET
60 W, P3dB @ 28 V, 2620 – 2690 MHz
Description
The PXAC260602FC is a 60-watt LDMOS FET with an asymmetrical
design intended for use in multi-standard cellular power amplifier
applications in the 2620 to 2690 MHz frequency band. Features
include dual-path design, high gain and thermally-enhanced package
with earless flanges. Manufactured with Infineon's advanced LDMOS
process, this device provides excellent thermal performance and
superior reliability.
Two-carrier WCDMA Drive-up
VDD = 28 V, IDQ = 85 mA, VGS = 2.62V,
ƒ = 2690 MHz, 3GPP WCDMA signal,
PAR = 8 dB, 10 MHz carrier spacing,
BW 3.84 MHz
17
Gain
16
60
50
15 40
14
Efficiency
13
30
20
12
pxac260602fc_g1
10
27 29 31 33 35 37 39 41 43 45 47
Output Power (dBm)
RF Characteristics
PXAC260602FC
Package H-37248-4
Features
• Main: Input matched
Peak: Input and output matching
• Asymmetric Doherty design
- Main: P1dB = 15 W Typ
- Peak: P1dB = 50 W Typ
• Typical Pulsed CW performance, 2690 MHz,
28 V, 10 µs pulse width, 10% duty cycle, class AB,
Doherty Configuration
- Output power at P1dB = 50 W
- Efficiency = 50%
- Gain = 15 dB
• Typical two-carrier WCDMA performance,
2690 MHz, 28 V, 8 dB PAR @ 0.01% CCDF,
Doherty Configuration
- Output power = 5 W
- Efficiency = 40%
- Gain = 15.7 dB
- IMD = –30 dBc
• Capable of handling 10:1 VSWR @28 V, 50 W
(CW) output power
• Integrated ESD protection : Human Body Model,
Class 1B (per JESD22-A114)
• Low thermal resistance
• Pb-free and RoHS compliant
Single-carrier WCDMA Specifications (tested in Infineon Doherty test fixture)
VDD = 28 V, IDQ = 85 mA, POUT = 5 W avg, VGS(PK) = VGS at 300 mA -1.0V, ƒ = 2620 – 2690 MHz, 3GPP signal, channel
bandwidth = 3.84 MHz, peak/average = 10 dB @ 0.01% CCDF
Characteristic
Symbol
Linear Gain
Drain Efficiency
Adjacent Channel Power Ratio
Gps
hD
ACPR
All published data at TCASE = 25°C unless otherwise indicated
ESD: Electrostatic discharge sensitive device—observe handling precautions!
Data Sheet
1 of 8
Min
14
35
Typ
15.7
39
–31
Max
–28
Unit
dB
%
dBc
Rev. 02.4, 2016-06-22




PXAC260602FC pdf, 반도체, 판매, 대치품
PXAC260602FC
Typical Performance (cont.)
Small Signal CW Performance
Gain & Input Return Loss
VDD = 28 V, IDQ = 85 mA
17.5 0
16.5
Gain
-5
15.5
14.5
-10
IRL
-15
13.5
2500
2550
2600 2650 2700
Frequency (MHz)
pxac260602fc_g6
-20
2750 2800
Load Pull Performance
Main Side Load Pull Performance – Pulsed CW signal: 10 µs, 10% duty cycle, 28 V, 80 mA
Max Output Power
P1dB
Max PAE
Freq
[MHz]
Zs
[W]
Zl
Gain
POUT
POUT
PAE
Zl
Gain
POUT
[W]
[dB]
[dBm]
[W]
[%]
[W]
[dB]
[dBm]
2490 9.0 – j33 12.8 – j9.5 19.2
42.84
19.2
54.2 5.8 – j4.4 21.9 41.49
2620 25 – j47 13.9 – j10.6 18.8
43.15
20.6
58.7 8.9 – j6.8 20.4 42.24
2690 35 – j52 12.7 – j13.0 18.6
42.76
18.9
55.4 6.8 – j9.2 20.6 41.73
POUT
[W]
14.1
16.7
14.9
PAE
[%]
68.7
66.4
65.6
Peak Side Load Pull Performance – Pulsed CW signal: 10 µs, 10% duty cycle, 28 V, 250 mA
Max Output Power
P1dB
Max PAE
Freq
[MHz]
Zs
[W]
Zl
Gain
POUT
POUT
PAE
Zl
Gain
POUT
[W]
[dB]
[dBm]
[W]
[%]
[W]
[dB]
[dBm]
2490 4.1 – j13.1 3.7 – j5.2 16.7 48.44
70
56.0 6.2 – j1.3 18.9 46.59
2620 6.5 – j14.8 3.7 – j6.5
17
48.28
67
55.4 5.9 – j3.7 19.1 46.96
2690 9.0 – j17.8 3.7 – j6.1 17.6 48.11
65
56.2 5.7 – j2.4 20.9 46.30
POUT
[W]
46
50
43
PAE
[%]
63.4
63.1
64.6
Data Sheet
4 of 8
Rev. 02.4, 2016-06-22

4페이지










PXAC260602FC 전자부품, 판매, 대치품
PXAC260602FC
Package Outline Specifications
2X 4.83±0.51
[.190±0.020]
2X 45° X 2.72
[45° X .107]
Package H-37248-4
(8.89
[.350])
CL
(5.08
[.200])
D1 D2
4X R0.76+-00.3.183
[
R.030
+0.005
-0.015
]
FLANGE 9.78
[.385]
LID 9.40
[.370]
CL
19.43±0.51
[.765±0.020]
G1 G2
SPH 1.57
[.062]
2X 12.70
[.500]
19.81±0.20
[.780±0.008]
4X 3.81
[.150]
1.02
[.040]
0.0381 [.0015] -A-
H-37248-4_po_02_01-09-2013
3.76±0.25
[.148±0.010]
CL
S
20.57
[.810]
Diagram Notes—unless otherwise specified:
1. Interpret dimensions and tolerances per ASME Y14.5M-1994.
2. Primary dimensions are mm. Alternate dimensions are inches.
3. All tolerances ± 0.127 [.005] unless specified otherwise.
4. Pins: D1, D2 – drains; G1, G2 – gates; S – source.
5. Lead thickness: 0.10 + 0.076/–0.025 mm [0.004+0.003/–0.001 inch].
6. Gold plating thickness: 1.14 ± 0.38 micron [45 ± 15 microinch].
Find the latest and most complete information about products and packaging at the Infineon Internet page
http://www.infineon.com/rfpower
Data Sheet
7 of 8
Rev. 02.4, 2016-06-22

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PXAC260602FC

Thermally-Enhanced High Power RF LDMOS FET

Infineon
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