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9ZXL1550 데이터시트 PDF




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부품번호 9ZXL1550 기능
기능 15-output DB1900Z Low-Power Derivative
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9ZXL1550 데이터시트, 핀배열, 회로
15-output DB1900Z Low-Power Derivative
9ZXL1550
DATASHEET
Description
The 9ZXL1550 is a DB1900Z derivative buffer utilizing
Low-Power HCSL (LP-HCSL) outputs to increase edge rates
on long traces, reduce board space, and reduce power
consumption more than 50% from the original 9ZX21501. It is
pin-compatible to the 9ZXL1530 and has the output
terminations integrated. It is suitable for PCI-Express
Gen1/2/3 or QPI/UPI applications, and uses a fixed external
feedback to maintain low drift for demanding QPI/UPI
applications.
Recommended Application
Buffer for Romley, Grantley and Purley Servers
Key Specifications
Cycle-to-cycle jitter: < 50ps
Output-to-output skew: <75ps
Input-to-output delay variation: <50ps
Phase jitter: PCIe Gen3 < 1ps rms
Phase jitter: QPI 9.6GB/s < 0.2ps rms
Block Diagram
Features/Benefits
LP-HCSL outputs; up to 90% IO power reduction, better
signal integrity over long traces
Direct connect to 85transmission lines; eliminates 60
termination resistors, saves 103mm2 area
Pin compatible to the 9ZXL1530; easy upgrade to reduced
board space
64-VFQFPN package; smallest 15 output Z-buffer
Fixed feedback path: ~ 0ps input-to-output delay
9 Selectable SMBus addresses; multiple devices can share
same SMBus segment
Separate VDDIO for outputs; allows maximum power
savings
PLL or bypass mode; PLL can dejitter incoming clock
100MHz & 133.33MHz PLL mode; legacy QPI/UPI support
Selectable PLL BW; minimizes jitter peaking in downstream
PLL's
Spread spectrum compatible; tracks spreading input clock
for EMI reduction
SMBus Interface; unused outputs can be disabled
Output Features
15 - LP-HCSL Differential Output Pairs w/integrated
terminations (Zo = 85)
DIF_IN
DIF_IN#
HIBW_BYPM_LOBW#
100M_133M#
CKPWRGD/PD#
SMB_A0_tri
SMB_A1_tri
SMBDAT
SMBCLK
Logic
Z-PLL
(SS Compatible)
9ZXL1550 REVISION E 11/20/15
1
FBOUT_NC
DIF(14:0)
©2015 Integrated Device Technology, Inc.




9ZXL1550 pdf, 반도체, 판매, 대치품
9ZXL1550 DATASHEET
Pin Descriptions (cont.)
PIN #
PIN NAME
33 DIF5
34 DIF5#
35 GND
36 VDDIO
37 DIF6
38 DIF6#
39 DIF7
40 DIF7#
41 VDD
42 GND
43 DIF8
44 DIF8#
45 DIF9
46 DIF9#
47 GND
48 VDDIO
49 DIF10
50 DIF10#
51 VDDIO
52 GND
53 DIF11
54 DIF11#
55 DIF12
56 DIF12#
57 GND
58 VDD
59 DIF13
60 DIF13#
61 DIF14
62 DIF14#
63 VDDIO
64 GND
65 EPAD
TYPE
OUT
OUT
GND
PWR
OUT
OUT
OUT
OUT
PWR
GND
OUT
OUT
OUT
OUT
GND
PWR
OUT
OUT
PWR
GND
OUT
OUT
OUT
OUT
GND
PWR
OUT
OUT
OUT
OUT
PWR
GND
GND
Differential true clock output
Differential Complementary clock output
Ground pin.
Power supply for differential outputs
Differential true clock output
Differential Complementary clock output
Differential true clock output
Differential Complementary clock output
Power supply, nominal 3.3V
Ground pin.
Differential true clock output
Differential Complementary clock output
Differential true clock output
Differential Complementary clock output
Ground pin.
Power supply for differential outputs
Differential true clock output
Differential Complementary clock output
Power supply for differential outputs
Ground pin.
Differential true clock output
Differential Complementary clock output
Differential true clock output
Differential Complementary clock output
Ground pin.
Power supply, nominal 3.3V
Differential true clock output
Differential Complementary clock output
Differential true clock output
Differential Complementary clock output
Power supply for differential outputs
Ground pin.
Epad should be connected to GND
DESCRIPTION
15-OUTPUT DB1900Z LOW-POWER DERIVATIVE
4
REVISION E 11/20/15

4페이지










9ZXL1550 전자부품, 판매, 대치품
9ZXL1550 DATASHEET
Electrical Characteristics–DIF LP-HCSL Differential Outputs
TA = TCOM; Supply Voltage VDD/VDDA = 3.3 V +/-5%, VDDIO = 1.05 to 3.3V +/-5%. See Test Loads for Loading Conditions
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS NOTES
Slew rate
Slew rate matching
Trf
Trf
Scope averaging on
Slew rate matching.
1.5 2.7
4 V/ns 1, 2, 3
8.8 20 % 1, 2, 4
Voltage High
Voltage Low
VHigh
VLow
Statistical measurement on single-ended signal 660 787 850
using oscilloscope math function. (Scope
mV
averaging on)
-150 33 150
Max Voltage
Min Voltage
Vmax
Vmin
Single ended signal using absolute value.
Includes 300mV of over/undershoot. (Scope
845 1150
-300 9
mV
Crossing Voltage (abs)
Crossing Voltage (var)
Vcross_abs
-Vcross
Scope averaging off
Scope averaging off
250 471 550 mV 1, 5
14 140 mV 1, 6
1Guaranteed by design and characterization, not 100% tested in production. CL = 2pF with RS = 27for Zo = 85differential trace
impedance.
2 Measured from differential waveform
3 Slew rate is measured through the Vswing voltage range centered around differential 0V. This results in a +/-150mV window around
differential 0V.
4 Matching applies to rising edge rate for Clock and falling edge rate for Clock#. It is measured using a +/-75mV window centered on
the average cross point where Clock rising meets Clock# falling. The median cross point is used to calculate the voltage thresholds the
oscilloscope is to use for the edge rate calculations.
5 Vcross is defined as voltage where Clock = Clock# measured on a component test board and only applies to the differential rising
edge (i.e. Clock rising and Clock# falling).
6 The total variation of all Vcross measurements in any particular system. Note that this is a subset of Vcross_min/max (Vcross
absolute) allowed. The intent is to limit Vcross induced modulation by setting -Vcross to be smaller than Vcross absolute.
Electrical Characteristics–Current Consumption
TA = TCOM; Supply Voltage VDD/VDDA = 3.3 V +/-5%, VDDIO = 1.05 to 3.3V +/-5%. See Test Loads for Loading Conditions
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
Operating Supply Current
IDDVDD
IDDVDDA/R
IDDVDDIO
All outputs 100MHz, CL = 2pF; Zo = 85
All outputs 100MHz, CL = 2pF; Zo = 85
All outputs 100MHz, CL = 2pF; Zo = 85
17 30 mA
15 20 mA
112 150 mA
IDDVDDPD
All differential pairs low-low
2.1 4 mA
Powerdown Current
IDDVDDA/RPD
IDDVDDIOPD
All differential pairs low-low
All differential pairs low-low
4.4 7 mA
0.0 1.5 mA
1Guaranteed by design and characterization, not 100% tested in production.
NOTES
1
1
1
1
1
1
REVISION E 11/20/15
7 15-OUTPUT DB1900Z LOW-POWER DERIVATIVE

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9ZXL1550

15-output DB1900Z Low-Power Derivative

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