LZ93N61 Datasheet PDF - Sharp Electrionic Components
| Part Number | LZ93N61 | |
| Description | Timing Pulse Generator LSI for CCD | |
| Manufacturers | Sharp Electrionic Components | |
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LZ93N61
LZ93N61
DESCRIPTION
The LZ93N61 is a CMOS timing generator LSI
which provides timing pulses used to drive a
CCD area sensor, in combination with the SSG
LSI (LZ93NI 9, LZ93B53).
FEATURES
q Switchable between 270000 pixels CCD and
320000 pixels CCD
q Switchable between NTSC (EIA) and PAL
(CCIR) systems
q Internal electronic shutter :
Shutter speed is selectable from 1/W, 1/125,
1/250, 1/500, 1/1 000, 1/2 000, 1/4 000 and
1/10 000 s, in addition to this, 1/100 s (PAL
: 1/120 s) in Flicker-less mode using parallel
or serial code. Shutter speed can also be
controlled in 1 H period using an external
trigger to the EXST input.
c Single +5 V power supply
q Package : 48-pin QFP(QFP048-P-I 01 O)
Timing Pulse Generator LSI for CCD
PIN CONNECTIONS
48-PIN QFP
TOP VIEW
IVlx 37
V2X 3a
V3X 39
V4X 40
OFDX 41
FR 42
GND 43
FH2 44
FHI 45
CKI 46
CKO 47
TSTI W
o
124R12
23 R12
22 C12
21 CI1
20 FCDS
19 S12
18 SI1
17 FS
16 SP12
15 SPII
14 SP2
13 SPI
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U93N61
PU.or-N. 1 C--V-M--R--~-
15 SPI 1
16 SP12
17 FS
18 SI 1
19 S12
20 FCDS
21 c11
22 C12
23 RI j
24 R12
25 MCKI
26 MCK2
27 MCK3
28 MCK4
29 SE
30 Vcc
31 GND
II/n
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I M.-LA—R....~.
PIN NAME
IC
SPI and SP2 phase
m control input 1
FUNCTON
The SPII pin sets the falling edge of COICS sampling
pulses SP1 (pin 13) and SP2 (pin 14).
Ic
SP1 and SPZ phase The SP12 pin sets the rising edge of color sampling
N control input 2
pulses SPI (pin 13) and SP2 (pin 14).
o n CDS pulse 2
The FS pin outputs the pulses for sampling output
signals of CCD.
Ic m FS phase control input 1 The SII pin sets the phase of the FS (pin 17).
Ic nn FS phase control input 2 The SIZ pin sets the width of the FS (pin 17).
o n FCDS pulse 1
The FCDS pin outputs the pulse to clamp the out-
put signals of CCD.
Ic
FCDS phase control
m input 1
The Cl 1 pin sets the phase of the FCDS (pin 20).
FCDS phase control
Ic N input 2
The CIZ pin sets the width of the FCDS (pin 20).
FR phase control
Ic nn input 1
The RI I pin sets the pahse of the FR (pin 42).
Ic
FR phase control
nn input 2
The R12 pin sets the width of the FR (pin 42).
o nn Clock output 1
The MCKI pin outputs 1/2 dividing pulse of CKI (pin
46). It is the same phase with the FH i (pin 45).
o nn Clink output 2
The MCK2 pin outputs 1/2 dividi~ pulse of CKI (pin
46). It is delayad by approximately 90° in phase with
respect to FH1 (pin 45).
o nrl Clwk output 3
Tk MCK3 pin outputs 1/2 dividing pulse of CKI (pin
46). It is the same phase with the FHz (pin 44).
o m Clock output 4
The MCK4 pin outputs 1/2 dividing pulse of CKI (pin
46). It is delayed by approximately 90” in phase witi
respect to FH2 (pin 44).
The SE pin outputs the demodulation carrier of out-
put signals of CCD, and input the switching signal
Color demodulation
of color sampling pulses SP1 (pin 13) and SPZ (pin
o rL pulw
14). It outputs 1/4 dividing pulse of the CKI input
(pin 46), and selects the phase in mmbination with
the SESL (pin 32) and the SINV (pin 34).
– — Power supply
The Vcc is a + 5 V power supply pin.
– – Ground
The GND is a ground pin.
291
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Part DetailsOn this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for LZ93N61 electronic component. |
| Information | Total 12 Pages | |
| Link URL | [ Copy URL to Clipboard ] | |
| Download | [ LZ93N61.PDF Datasheet ] | |
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