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Número de pieza RX3140
Descripción RX3140 Low Power IF Receiver IC
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RX3140 Low Power IF Receiver IC
the wireless IC company
HiMARK Technology, Inc. reserves the right to change the product described in this datasheet. All information con-
tained in this datasheet is subject to change without prior notice. HiMARK Technology, Inc. assumes no responsibility
for the use of any circuits shown in this datasheet.
Description
The RX3140 is a low power IF receiver IC which is fully compatible with the Toshiba
TA31142 IC and is suitable for use as the second IF downconverter in double-conversion
paging systems. The RX3140 is well-suited for POCSAG paging applications and incor-
porates a 2-level FSK demodulator consisting of a quadrature FM demodulator, on-chip
bit-rate filter, and 1-bit comparator. An on-chip 1 V regulator is provided for convenient
biasing of off-chip circuitry.
Features
u Extremely low power operation with power-down feature
u Built-in crystal oscillator for mixer local oscillator
u Mixer input frequency: 10 — 50 MHz
u Quadrature detector
u On-chip bit-rate filter
u Audio output
u 1-bit comparator with open collector output
u 1 V regulator
u 1.1 V low battery alarm
u SSOP-20 package (0.65 mm pitch)
Block Diagram
20 19 18 17 16 15 14 13
MIX
VSS
REG
REG
ALM
FSK
CHA
BS
IN
OUT
CON
OUT
RGE
12 11
LPF LPF
OUT
IN
1.0 V
REGULATOR
LOW
1-BIT
BATTERY COMPARATOR
ALARM
CHARGE/
DISCHARGE
CIRCUIT
MIXER
OSCILLATOR
QUAD
DETECTOR
IFAMP
OSC
IN
1
OSC
OUT
2
MIX
OUT VCC
34
IFIN
5
DEC
6
FSK
REF
7
IF
OUT
8
AF
QUAD OUT
9 10
Revision B
Page 1
May 2000

1 page




RX3140 pdf
the wireless IC company
RX3140
Functional Description
The RX3140 IF receiver IC incorporates a mixer, crystal-based local oscillator, IF ampli-
fier, quadrature FM demodulator, bit-rate filter, and 1-bit comparator and is capable of
demodulating 2-level FSK input signals. In addition, 1.0 V regulator and 1.1 V low bat-
tery alarm functions are provided.
Power-down Function
The entire receiver IC may be powered up and down through the control of the BS input
(pin 13). During power down operation, the quiescent current consumption of the IC
drops to approximately 0 µA. The high input impedance of the BS pin allows for direct
interfacing with the CMOS output of an off-chip microcontroller.
Charge/Discharge Circuitry
The function of the charge/discharge circuitry is for both fast and slow charging/discharg-
ing of the capacitor used for storing the voltage reference level of the FSKREF pin. The
CHARGE input (pin 14) should be enabled (CHARGE = high = fast charge) immediately
after transition of the receiver IC from power-down to normal operation in order to reduce
the charging/discharging time for coarse adjustment of the FSKREF voltage to the appro-
priate dc level (i.e. dc level of the LPFOUT pin) and consequently to minimize the errone-
ous output of the 1-bit comparator. During actual data reception, the CHARGE pin should
be set to low (CHARGE = low = slow charge) for fine adjustment of the FSKREF voltage.
1-bit Comparator
The integrated 1-bit comparator operates as a data slicer and squares upthe bit-rate fil-
tered output from the quadrature demodulator. The decision threshold voltage level for
the 1-bit comparator is stored on an external capacitor connected to the FSKREF pin.
Regulator
The on-chip 1.0 V regulator requires a suitable off-chip PNP transistor to achieve regula-
tion. The external PNP transistor should have an hFE > 200 for VCE 0.1 V .
Low Battery Alarm
The low battery alarm output, ALM, is normally low, but rises to 1.1 V (VCC) when the
VCC voltage falls below approximately 1.1 V.
Revision B
Page 5
May 2000

5 Page










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