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PDF PHP12NQ15T Data sheet ( Hoja de datos )

Número de pieza PHP12NQ15T
Descripción N-channel TrenchMOS transistor
Fabricantes NXP Semiconductors 
Logotipo NXP Semiconductors Logotipo



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Philips Semiconductors
N-channel TrenchMOStransistor
Product specification
PHP12NQ15T, PHB12NQ15T
PHD12NQ15T
FEATURES
’Trench’ technology
• Low on-state resistance
• Fast switching
• Low thermal resistance
SYMBOL
d
g
s
QUICK REFERENCE DATA
VDSS = 150 V
ID = 12.5 A
RDS(ON) 200 m
GENERAL DESCRIPTION
N-channel enhancement mode field-effect power transistor in a plastic envelope using ’trench’ technology. The device
has very low on-state resistance. It is intended for use in dc to dc converters and general purpose switching applications.
The PHP12NQ15T is supplied in the SOT78 (TO220AB) conventional leaded package.
The PHB12NQ15T is supplied in the SOT404 (D2PAK) surface mounting package.
The PHD12NQ15T is supplied in the SOT428 (DPAK) surface mounting package.
PINNING
SOT78 (TO220AB) SOT404 (D2PAK)
SOT428 (DPAK)
PIN DESCRIPTION
tab
tab tab
1 gate
2 drain 1
3 source
tab drain
1 23
2
13
2
13
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
VDSS
VDGR
VGS
ID
IDM
PD
Tj, Tstg
Drain-source voltage
Drain-gate voltage
Gate-source voltage
Continuous drain current
Pulsed drain current
Total power dissipation
Operating junction and
storage temperature
Tj = 25 ˚C to 175˚C
Tj = 25 ˚C to 175˚C; RGS = 20 k
Tmb = 25 ˚C; VGS = 10 V
Tmb = 100 ˚C; VGS = 10 V
Tmb = 25 ˚C
Tmb = 25 ˚C
MIN.
-
-
-
-
-
-
-
- 55
MAX.
150
150
± 20
12.5
8.8
50
88
175
UNIT
V
V
V
A
A
A
W
˚C
1 It is not possible to make connection to pin:2 of the SOT404 or SOT428 packages.
August 1999
1
Rev 1.000

1 page




PHP12NQ15T pdf
Philips Semiconductors
N-channel TrenchMOStransistor
Product specification
PHP12NQ15T, PHB12NQ15T
PHD12NQ15T
Drain current, ID (A)
20
18 VDS > ID X RDS(ON)
16
14
12
10
8 175 C
6 Tj = 25 C
4
2
0
01234567
Gate-source voltage, VGS (V)
8
9
Fig.7. Typical transfer characteristics.
ID = f(VGS)
10
Transconductance, gfs (S)
15
14 VDS > ID X RDS(ON)
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0 2 4 6 8 10 12
Drain current, ID (A)
14
Tj = 25 C
175 C
16 18 20
Fig.8. Typical transconductance, Tj = 25 ˚C.
gfs = f(ID)
Normalised On-state Resistance
2.9
2.7
2.5
2.3
2.1
1.9
1.7
1.5
1.3
1.1
0.9
0.7
0.5
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
Junction temperature, Tj (C)
Fig.9. Normalised drain-source on-state resistance.
RDS(ON)/RDS(ON)25 ˚C = f(Tj)
Threshold Voltage, VGS(TO) (V)
4.5
4 maximum
3.5
3 typical
2.5
2 minimum
1.5
1
0.5
0
-60 -40 -20
0 20 40 60 80 100 120 140 160 180
Junction Temperature, Tj (C)
Fig.10. Gate threshold voltage.
VGS(TO) = f(Tj); conditions: ID = 1 mA; VDS = VGS
1.0E-01 Drain current, ID (A)
1.0E-02
1.0E-03
1.0E-04
1.0E-05
minimum
typical
maximum
1.0E-06
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5
Gate-source voltage, VGS (V)
Fig.11. Sub-threshold drain current.
ID = f(VGS); conditions: Tj = 25 ˚C
5
Capacitances, Ciss, Coss, Crss (pF)
10000
1000
Ciss
Coss
100
Crss
10
0.1
1 10
Drain-Source Voltage, VDS (V)
100
Fig.12. Typical capacitances, Ciss, Coss, Crss.
C = f(VDS); conditions: VGS = 0 V; f = 1 MHz
August 1999
5
Rev 1.000

5 Page





PHP12NQ15T arduino
Philips Semiconductors
N-channel TrenchMOStransistor
MOUNTING INSTRUCTIONS
Dimensions in mm
Product specification
PHP12NQ15T, PHB12NQ15T
PHD12NQ15T
7.0
7.0
2.15 1.5
2.5
4.57
Fig.20. SOT428 : soldering pattern for surface mounting.
August 1999
11
Rev 1.000

11 Page







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