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PDF PHP30NQ15T Data sheet ( Hoja de datos )
| Número de pieza | PHP30NQ15T | |
| Descripción | N-channel TrenchMOS transistor | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
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Philips Semiconductors
N-channel TrenchMOS™ transistor
Product specification
PHP30NQ15T, PHB30NQ15T
FEATURES
• ’Trench’ technology
• Very low on-state resistance
• Fast switching
• Low thermal resistance
SYMBOL
d
g
s
QUICK REFERENCE DATA
VDSS = 150 V
ID = 29 A
RDS(ON) ≤ 63 mΩ
GENERAL DESCRIPTION
N-channel enhancement mode field-effect power transistor in a plastic envelope using ’trench’ technology. The device
has very low on-state resistance. It is intended for use in dc to dc converters and general purpose switching applications.
The PHP30NQ15T is supplied in the SOT78 (TO220AB) conventional leaded package.
The PHB30NQ15T is supplied in the SOT404 (D2PAK) surface mounting package.
PINNING
SOT78 (TO220AB)
SOT404 (D2PAK)
PIN DESCRIPTION
1 gate
tab
tab
2 drain1
3 source
tab drain
1 23
2
13
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
VDSS
VDGR
VGS
ID
IDM
PD
Tj, Tstg
Drain-source voltage
Drain-gate voltage
Gate-source voltage
Continuous drain current
Pulsed drain current
Total power dissipation
Operating junction and
storage temperature
Tj = 25 ˚C to 175˚C
Tj = 25 ˚C to 175˚C; RGS = 20 kΩ
Tmb = 25 ˚C; VGS = 10 V
Tmb = 100 ˚C; VGS = 10 V
Tmb = 25 ˚C
Tmb = 25 ˚C
MIN.
-
-
-
-
-
-
-
- 55
MAX.
150
150
± 20
29
20
116
150
175
UNIT
V
V
V
A
A
A
W
˚C
1 It is not possible to make connection to pin:2 of the SOT404 package
August 1999
1
Rev 1.000
1 page  
Philips Semiconductors
N-channel TrenchMOS™ transistor
Product specification
PHP30NQ15T, PHB30NQ15T
Drain current, ID (A)
30
VDS > ID X RDS(ON)
25
20
15 175 C
Tj = 25 C
10
5
0
0123456789
Gate-source voltage, VGS (V)
Fig.7. Typical transfer characteristics.
ID = f(VGS)
10
Transconductance, gfs (S)
40
VDS > ID X RDS(ON)
35
30
Tj = 25 C
25
175 C
20
15
10
5
0
0 5 10 15 20 25 30
Drain current, ID (A)
Fig.8. Typical transconductance, Tj = 25 ˚C.
gfs = f(ID)
Normalised On-state Resistance
2.9
2.7
2.5
2.3
2.1
1.9
1.7
1.5
1.3
1.1
0.9
0.7
0.5
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
Junction temperature, Tj (C)
Fig.9. Normalised drain-source on-state resistance.
RDS(ON)/RDS(ON)25 ˚C = f(Tj)
Threshold Voltage, VGS(TO) (V)
4.5
4 maximum
3.5
3 typical
2.5
2 minimum
1.5
1
0.5
0
-60 -40 -20
0 20 40 60 80 100 120 140 160 180
Junction Temperature, Tj (C)
Fig.10. Gate threshold voltage.
VGS(TO) = f(Tj); conditions: ID = 1 mA; VDS = VGS
1.0E-01 Drain current, ID (A)
1.0E-02
1.0E-03
1.0E-04
1.0E-05
minimum
typical
maximum
1.0E-06
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5
Gate-source voltage, VGS (V)
Fig.11. Sub-threshold drain current.
ID = f(VGS); conditions: Tj = 25 ˚C
5
Capacitances, Ciss, Coss, Crss (pF)
10000
Ciss
1000
Coss
100
Crss
10
0.1
1 10
Drain-Source Voltage, VDS (V)
100
Fig.12. Typical capacitances, Ciss, Coss, Crss.
C = f(VDS); conditions: VGS = 0 V; f = 1 MHz
August 1999
5
Rev 1.000
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet PHP30NQ15T.PDF ] | |
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