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부품번호 | 74VHC125 기능 |
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기능 | QUAD BUS BUFFERS 3-STATE | ||
제조업체 | STMicroelectronics | ||
로고 | ![]() |
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전체 12 페이지수
![]() 74VHC125
QUAD BUS BUFFERS (3-STATE)
s HIGH SPEED: tPD = 3.8ns (TYP.) at VCC = 5V
s LOW POWER DISSIPATION:
ICC = 4 µA (MAX.) at TA=25°C
s HIGH NOISE IMMUNITY:
VNIH = VNIL = 28% VCC (MIN.)
s POWER DOWN PROTECTION ON INPUTS
s SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 8mA (MIN)
s BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL
s OPERATING VOLTAGE RANGE:
VCC(OPR) = 2V to 5.5V
s PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 125
s IMPROVED LATCH-UP IMMUNITY
s LOW NOISE: VOLP = 0.8V (MAX.)
DESCRIPTION
The 74VHC125 is an advanced high-speed
CMOS QUAD BUS BUFFERS fabricated with
sub-micron silicon gate and double-layer metal
wiring C2MOS technology.
The device requires the 3-STATE control input G
to be set high to place the output in to the high
impedance state.
SOP
TSSOP
Table 1: Order Codes
PACKAGE
SOP
TSSOP
T&R
74VHC125MTR
74VHC125TTR
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage. This device can be
used to interface 5V to 3V.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
Figure 1: Pin Connection And IEC Logic Symbols
November 2004
Rev. 7
1/12
![]() ![]() 74VHC125
Table 8: Capacitive Characteristics
Test Condition
Value
Symbol
Parameter
CIN
COUT
CPD
Input Capacitance
Output
Capacitance
Power Dissipation
Capacitance
(note 1)
TA = 25°C
-40 to 85°C -55 to 125°C Unit
Min. Typ. Max. Min. Max. Min. Max.
6 10 10 10 pF
8 pF
16 pF
1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/4 (per circuit)
Table 9: Dynamic Switching Characteristics
Test Condition
Value
Symbol
Parameter
VOLP
VOLV
VIHD
VILD
Dynamic Low
Voltage Quiet
Output (note 1, 2)
Dynamic High
Voltage Input
(note 1, 3)
Dynamic Low
Voltage Input
(note 1, 3)
VCC
(V)
5.0
5.0
5.0
CL = 50 pF
TA = 25°C
-40 to 85°C -55 to 125°C Unit
Min. Typ. Max. Min. Max. Min. Max.
0.3 0.8
-0.8 -0.3
V
3.5 V
1.5 V
1) Worst case package.
2) Max number of outputs defined as (n). Data inputs are driven 0V to 5.0V, (n-1) outputs switching and one output at GND.
3) Max number of data inputs (n) switching. (n-1) switching 0V to 5.0V. Inputs under test switching: 5.0V to threshold (VILD), 0V to threshold
(VIHD), f=1MHz.
4/12
4페이지 ![]() ![]() DIM.
A
A1
A2
B
C
D
E
e
H
h
L
k
ddd
MIN.
1.35
0.1
1.10
0.33
0.19
8.55
3.8
5.8
0.25
0.4
0°
SO-14 MECHANICAL DATA
mm.
TYP
1.27
MAX.
1.75
0.25
1.65
0.51
0.25
8.75
4.0
6.2
0.50
1.27
8°
0.100
MIN.
0.053
0.004
0.043
0.013
0.007
0.337
0.150
0.228
0.010
0.016
0°
74VHC125
inch
TYP.
0.050
MAX.
0.069
0.010
0.065
0.020
0.010
0.344
0.157
0.244
0.020
0.050
8°
0.004
0016019D
7/12
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DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |