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74HCT160 PDF 데이터시트 : 부품 기능 및 핀배열

부품번호 74HCT160
기능 Presettable synchronous BCD decade counter asynchronous reset
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74HCT160 데이터시트, 핀배열, 회로
INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT160
Presettable synchronous BCD
decade counter; asynchronous
reset
Product specification
File under Integrated Circuits, IC06
December 1990




74HCT160 pdf, 반도체, 판매, 대치품
Philips Semiconductors
Presettable synchronous BCD decade
counter; asynchronous reset
Product specification
74HC/HCT160
Fig.4 Functional diagram.
FUNCTION TABLE
OPERATING MODE
reset (clear)
parallel load
count
hold
(do nothing)
INPUTS
OUTPUTS
MR CP CEP CET PE Dn Qn
L XXXXXL
HXXI
HXXI
IL
hH
H h h h X count
HXI
X h X qn
HXXI
h X qn
TC
L
L
(1)
(1)
(1)
L
Notes
1. The TC output is HIGH when CET is HIGH and the counter is at terminal count (HLLH).
H = HIGH voltage level
h = HIGH voltage level one set-up time prior to the LOW-to-HIGH CP transition
L = LOW voltage level
I = LOW voltage level one set-up time prior to the LOW-to-HIGH CP transition
q = lower case letters indicate the state of the referenced output one set-up time prior to the LOW-to-HIGH CP
transition
X = don’t care
= LOW-to-HIGH CP transition
December 1990
4

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74HCT160 전자부품, 판매, 대치품
Philips Semiconductors
Presettable synchronous BCD decade
counter; asynchronous reset
Product specification
74HC/HCT160
SYMBOL PARAMETER
tsu set-up time
CEP, CET to CP
th hold time
Dn to CP
th hold time
PE to CP
th hold time
CEP, CET to CP
fmax maximum clock pulse
frequency
Tamb (°C)
TEST CONDITIONS
min.
+25
typ.
max.
74HC
40 to +85
min. max.
40 to +125
min. max.
UNIT
VCC WAVEFORMS
(V)
200 63
40 23
34 18
250 300
50 60
43 51
ns 2.0 Fig. 12
4.5
6.0
0 17
0 6
0 5
0 41
0 15
0 12
0 58
0 21
0 17
6.0 18
30 55
35 66
0
0
0
0
0
0
0
0
0
4.8
24
28
0
0
0
0
0
0
0
0
0
4.0
20
24
ns 2.0 Figs 11 and 12
4.5
6.0
ns 2.0 Figs 11 and 12
4.5
6.0
ns 2.0 Figs 11 and 12
4.5
6.0
MHz 2.0 Fig. 8
4.5
6.0
December 1990
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