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PDF OXU121HP Data sheet ( Hoja de datos )
| Número de pieza | OXU121HP | |
| Descripción | USB On-The-Go Full-Speed Host and High-Speed Peripheral Controller | |
| Fabricantes | Oxford Semiconductor | |
| Logotipo |  |
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Data Sheet
Features
OXU121HP
USB On-The-Go Full-Speed Host and High-Speed
Peripheral Controller
Single‐chip USB OTG full‐speed host and high‐speed peripheral
controller
Replaces two‐chip system
Reduces system cost and board space
Minimizes system design complexity and power
consumption
Simultaneous host and peripheral operation
Compatible with the Universal Serial Bus Specification, Revision 2.0
and the On‐The‐Go Supplement to the USB Specification 2.0,
Revision 1.0
Single 3.3 V power supply, flexible I/O voltage of 1.65 V to 3.6 V
(LVCMOS/TTL) to interface to a wide range of MCUs
Low power operation, suitable for mobile applications
30 mA (max) for host operation
75 mA (max) for peripheral operation
Power saving mode for the host controller and suspend mode for
peripheral controller
Integrated on‐chip charge pump, supports up to 100 mA of
current, enables support for broad range of USB devices
Small package and footprint saves board space
7×7 mm BGA, 84‐ball, RoHS compliant
12×12 mm LQFP, 100‐pin, RoHS compliant
16‐bit memory mapped interface can gluelessly interface to most
popular microprocessors and DSPs
Fast microprocessor access cycle and double/multi‐buffering
support for all four types of USB transfers
Two DMA (slave) channels for the high‐speed peripheral
controller, lowering CPU utilization
Integrated PLL supports external crystal or crystal oscillators of
12 MHz and 30 MHz, for system flexibility
16 Kbytes of on‐chip SRAM, optimized buffer size for
performance/cost
DS-0040 Aug 06
External--Free Release
1
1 page  
Oxford Semiconductor, Inc.
OXU121HP Data Sheet
Electrical
Characteristics
Tables 3 to 11 detail the required operating conditions for the device and
the DC and AC electrical characteristics.
Table 1 Absolute Maximum Device Ratings
Symbol
VDD3.3
VDD1.8
VDDW
VI
TS
Note:
Parameter
3.3 V power supply
Condition
Min Max Unit
-0.3 4.0 V
1.8 V power supply
-0.3 2.16 V
1.8 V to 3.3 V power supply
-0.3 4.0 V
DC input voltage
-0.3 4.0 V
Storage temperature
-40 +150 °C
1 Permanent device damage may occur if absolute maximum ratings are exceeded.
Functional operation should be restricted to the normal operating conditions speci‐
fied in the following section. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.
Table 2 Recommended Operating Conditions
Symbol
VDD3.3
VDD1.8
VDDW
VI3.3
VIW
TO
Parameter
3.3 V power supply
1.8 V power supply
1.8 - 3.3 V
wide-range I/O power supply
DC input voltage of 3.3 V pins
DC input voltage of wide-range pins
Operating temperature
Condition
Min Max Unit
2.97 3.63
V
1.62 1.98
V
1.62 3.63
V
0 3.6 V
0 1.1*VDDW V
-40 +85 °C
DS-0040 Aug 06
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Oxford Semiconductor, Inc.
OXU121HP Data Sheet
Table 13 lists the LQFP pin allocations.
Table 13 OXU121HP 100-Pin LQFP Pin Allocations (Sheet 1 of 3)
Pin No. Type(1)
Bits
Processor Interface (37 pins)
2, 3, 4, 5, 8, 9, 10, 16
11, 13, 14, 15, 16,
96, 97, 98, 99
MSBCT
22, 23, 24, 25, 28, 12
29, 30 32, 33, 34,
35, 36
MSID
Name
D0 - D15
A1 - A12
Description
16-bit data bus. Pull-up/pull-down can be controlled
through register 0x034, bits 2:1. Default is none
Address bus for direct address space of 8 Kbytes.
Pull-up can be enabled through register 0x034, bits
9:8. Default is pull-down
20
1 MSIU
/WR
Write strobe. Pull-up can be disabled through register
0x034, bit 13. Default is pull-up
21
1 MSIU
/RD
Read strobe. Pull-up can be disabled through register
0x034, bit 13. Default is pull-up
39
1 MSIU
/CS
19 1 MOCT /INT
86
1 MSIU
/RESET
Chip select. Pull-up can be disabled through register
0x034, bit 13. Default is pull-up
Interrupt to the MCU.This pin can be software
configured as a driven output or open drain. Open
drain is the default
Hardware reset. Pull-up is always enabled
89, 92
90, 93
2 MOCT DRQ1, DRQ0
2 MSI
ACK1, ACK0
General Purpose I/O (1 pin)
88 1 BC
GPIO
DMA request outputs to support two channels
DMA acknowledge. Pull-up/pull-down can be
controlled through register 0x03A, bits 1:0. Default is
none
General purpose I/O
Power & Ground (34 pins)
1, 12, 27, 41, 51, 8
65, 75, 83
VSS
Digital/wide-range ground
42, 47, 69, 74, 82
6, 18, 40, 53, 57,
66, 84, 100
43, 48, 70, 73, 81
56, 78
7, 17, 26, 31, 85,
95
5
8
5
2
6
VSSA
VDD1.8
VDD3.3A
VDD3.3
VDDW
Analog ground
1.8 V core power. VREGOUT may be used for the
supplies
Analog +3.3 V power
Digital +3.3 V power
Wide-range I/O +1.8 V to +3.3 V. If using +1.8 V,
VREGOUT may be used for these supplies
USB Interface (13 pins)
76, 77
2
B
54, 55
2B
DP2, DM2
DP1, DM1
Data lines for host port 2, a dedicated USB host port.
If not used, these pins should be left floating
Data lines for host port 1, which can serve as a USB
host or an OTG port in combination with the
peripheral port. If not used, these pins should be left
floating
DS-0040 Aug 06
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| Páginas | Total 22 Páginas | |
| PDF Descargar | [ Datasheet OXU121HP.PDF ] | |
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