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PDF CXD2951GA-4 Data sheet ( Hoja de datos )
| Número de pieza | CXD2951GA-4 | |
| Descripción | Single Chip GPS LSI | |
| Fabricantes | Sony Corporation | |
| Logotipo |  |
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Single Chip GPS LSI
CXD2951GA-4
Description
The CXD2951GA-4 is a dedicated single chip LSI
for the GPS (Global Positioning System), satellite-
based location measurement system. This LSI
enables the configuration of a single chip system
providing a cost-effective, low-power solution.
Compared with conventional methods, position
detection time and sensitivity are substantially
improved with the use of an advanced signal
processing scheme. With the integration of both the
Radio and baseband blocks into a single CMOS IC,
the CXD2951GA-4 is ideal for use in automotive,
cellular handset, handheld navigation, mobile
computing and other location-based applications.
Features
• WAAS support
• 12-channel GPS receiver capable of simultaneously
receiving 12 satellites
• Reception frequency: 1575.42MHz
(L1 band, CA code)
• Reference clock (TCXO) frequency:
18.414MHz (GPS, Sony standard),
The unique frequency of major applications is available,
such as GSM and W-CDMA. (optional)
13.000MHz (GSM),
14.400MHz (CDMA),
16.368MHz (GPS),
19.800MHz (PDC/CDMA),
26.000MHz (GSM)
• 32 bits RISC CPU (ARM7TDMI)
• 288K-bytes Program ROM
• 72K-bytes Data RAM
Power is supplied only to 8K-byte Data RAM while
in backup mode.
• System power management
• 1-channel UART
• Internal RTC (Real Time Clock)
• 10-bit successive approximation system A/D
converter
• All-in-view positioning
• Communication format: Supports NMEA-0183 (Ver
3.01)
• 1 PPS output
176 pin LFLGA (Plastic)
Radio
• Image Rejection Mixer
• VCO Tank
• IF Filters
Structure
Silicon gate CMOS IC
Absolute Maximum Ratings
• Supply voltage I/O IOVDD
• Supply voltage core CVDD
• Supply voltage radio VDD
• Input voltage
VI
• Output voltage
VO
• Operating temperature Topr
• Storage temperature Tstg
–0.5 to +4.6
–0.5 to +2.5
–0.5 to +2.5
–0.5 to +6
–0.5 to +6
–40 to +85
–50 to +150
V
V
V
V
V
°C
°C
Recommended Operating Conditions
• Supply voltage I/O IOVDD 3.0 to 3.6
V
∗ Under operation with internal ROM, using no
external expansion bus:
IOVDD 2.6 to 3.6
∗ Under operation in backup mode:
V
BKUPIOVDD 2.5 (Min.) V
• Supply voltage core CVDD 1.62 to 1.98 V
• Supply voltage radio VDD 1.62 to 1.98 V
• Operating temperature Topr –40 to +85 °C
Input/Output Pin Capacitance (Baseband)
• Input capacitance
CIN
9 (Max.)
• Output capacitance COUT 11 (Max.)
• I/O capacitance
CI/O 11 (Max.)
pF
pF
pF
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
E04Z13
1 page  
CXD2951GA-4
Pin Description
Pin
No.
Symbol
I/O
Description
1 EPORT0
I/O/Z
I/O port 0
(with a software controllable pull-down resistor, Connected to GND with a resistor.)
2 EPORT1
I/O/Z
I/O port 1
(with a software controllable pull-down resistor, See software application note.)
3 EPORT2
I/O/Z
I/O port 2
(with a software controllable pull-down resistor, See software application note.)
4 EPORT3
I/O/Z
I/O port 3
(with a software controllable pull-down resistor, See software application note.)
5 EPORT4
I/O/Z
I/O port 4
(with a software controllable pull-down resistor, See software application note.)
6 EPORT5
I/O/Z
I/O port 5
(with a software controllable pull-down resistor, See software application note.)
7 EPORT6
I/O/Z
I/O port 6
(with a software controllable pull-down resistor, See software application note.)
8 EPORT7
I/O/Z
I/O port 7
(with a software controllable pull-down resistor, See software application note.)
9 EPORT8
I/O/Z
I/O port 8
(with a software controllable pull-down resistor, See software application note.)
10 EPORT9
I/O/Z
I/O port 9
(with a software controllable pull-down resistor, See software application note.)
11 EPORT10
I/O/Z
I/O port 10
(with a software controllable pull-down resistor, See software application note.)
12 EPORT11
I/O/Z
I/O port 11
(with a software controllable pull-down resistor, See software application note.)
13 EPORT12
I/O/Z
I/O port 12
(with a software controllable pull-down resistor, See software application note.)
14 IOVSS1
GND
15 IOVDD1
3.3V
16 ETCXO
17 EXTCXO
I
TCXO oscillator (Frequency selectable, See software application note.)
O
18 CVSS1
GND
19 CVDD1
1.8V
20 TRST
I Test (Open, with a pull-down resistor)
21 ETESTTINT O Test
22 TDO
O Test
23 ETESTTDO O Test
24 TDI
I Test (Open, with a pull-up resistor)
25 ETESTTDI
I Test (Open, with a pull-up resistor)
26 TCK
I Test (Open, with a pull-down resistor)
27 ETESTTCK I Test (Open, with a pull-down resistor)
28 TMS
I Test (Open, with a pull-up resistor)
–5–
5 Page 
Pin
No.
Symbol
44 MIXGND
45 LNASRC
46 VDDCP
Standard
pin voltage
[V]
0
0
1.8
41 LNAMAT
1.8
47 RFIN
—
48 MIXGND
49 LNASRC
50 MIXGND
0
0
0
51 TESTINP
—
52 TESTINN
—
Equivalent circuit
IF1VCC
47
41
7k
10k
LNASRC
51
200
52
IF1VCC
200
IF1GND
53 TESTOUTP —
IF1VCC
53
CXD2951GA-4
Description
Mixer GND
LNA GND
Charge pump 1.8V
LNA 1.8V
RF input
Mixer GND
LNA GND
Mixer GND
Radio test input pin
Normally leave open.
Radio test input pin
Normally leave open.
Radio test output pin
Capacitor and
resistor connection
54 TESTOUTN —
54
IF1GND
Radio test output pin
Capacitor and
resistor connection
– 11 –
11 Page | ||
| Páginas | Total 26 Páginas | |
| PDF Descargar | [ Datasheet CXD2951GA-4.PDF ] | |
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