DZPD6722 Datasheet PDF - Intel Corporation
| Part Number | DZPD6722 | |
| Description | (DZPD6710 / DZPD6722) ISA-to-PC-Card (PCMCIA) Controllers | |
| Manufacturers | Intel Corporation | |
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PD6710/’22
ISA-to-PC-Card (PCMCIA) Controllers
Datasheet
The PD6710 and PD6722 are single-chip PC Card (PCMCIA) controller solutions capable of
controlling one (PD6710) or two (PD6722) PC Card sockets. The chips are compliant with PC
Card Standard, PCMCIA 2.1, and JEIDA 4.1 and are optimized for use in embedded
applications and notebook/handheld/mobile computer systems where reduced form factor and
low power consumption are critical design objectives. With the PD6710, a complete PC Card
solution with power-control logic can occupy less than 1.5 square inches (excluding the socket
connector). With the PD6722, a complete dual-socket PC Card solution with power-control
logic can occupy less than 2 square inches (excluding socket connectors).
The chips employ energy-efficient mixed-voltage technology that can reduce system power
consumption by over 50 percent. The chips also provide: a Low-Power Dynamic mode, which
automatically stops the internal clock during periods of card inactivity; a software-controlled
Suspend mode, which dramatically reduces power by disabling most of the internal circuitry and
stopping data transactions to the PC Cards; and a hardware-controlled Super Suspend mode,
which reduces current to the µA range.
Personal computer applications typically access PC Cards through a third-party socket/card-
services software interface. To assure full compatibility with industry-standard socket/card-
services software and PC Card applications, the register set in the PD6710 and PD6722 is a
superset of the Intel 82365SL register set.
The chips provide fully buffered PC Card interfaces, meaning that no external logic is required
for buffering signals to/from the interface, and power consumption can be controlled by limiting
signal transitions on the PC Card bus.
As of May 2001, this document replaces the Basis Communications
Corp. document CL-PD6710/’22 — ISA-to-PC-Card Host Adapters.
May 2001
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ISA-to-PC-Card (PCMCIA) Controllers — PD6710/’22
16.0
17.0
18.0
19.0
Index
15.4.3 Preventing Dual Interpretation of DMA Handshake Signals...................99
15.4.4 Turning On DMA System .....................................................................100
15.4.5 The DMA Transfer Process ..................................................................100
15.4.6 Terminal Count to Card at Conclusion of Transfer ..............................100
Electrical Specifications......................................................................................101
16.1 Absolute Maximum Ratings...............................................................................101
16.2 DC Specifications ..............................................................................................101
16.3 AC Timing Specifications ..................................................................................104
16.4 ISA Bus Timing..................................................................................................104
16.4.1 Reset Timing ........................................................................................107
16.4.2 System Interrupt Timing .......................................................................107
16.4.3 General-Purpose Strobe Timing (PD6722 only)...................................108
16.4.4 Input Clock Specification ......................................................................108
16.4.5 PC Card Bus Timing Calculations ........................................................109
Package Specifications .......................................................................................121
17.1
17.2
17.3
144-Pin LQFP Package.....................................................................................121
208-Pin MQFP Package....................................................................................122
208-Pin LQFP Package.....................................................................................123
Order Numbers Example.....................................................................................124
Appendix A ...............................................................................................................125
19.1
19.2
19.3
19.4
19.5
19.6
Register Summary Tables.................................................................................125
19.1.1 Operation Registers .............................................................................125
Chip Control Registers ......................................................................................125
I/O Window Mapping Registers.........................................................................127
Memory Window Mapping Registers.................................................................129
Extension Registers ..........................................................................................130
Timing Registers ..............................................................................................133
....................................................................................................................................... 135
Datasheet
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| Information | Total 30 Pages | |
| Link URL | [ Copy URL to Clipboard ] | |
| Download | [ DZPD6722.PDF Datasheet ] | |
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