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9NQ20T 데이터시트 PDF




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9NQ20T 데이터시트, 핀배열, 회로
Philips Semiconductors
N-channel TrenchMOStransistor
Product specification
PHX9NQ20T , PHF9NQ20T
FEATURES
SYMBOL
QUICK REFERENCE DATA
’Trench’ technology
• Low on-state resistance
• Fast switching
• Low thermal resistance
d
g
VDSS = 200 V
ID = 5.2 A
RDS(ON) 400 m
www.DataSheet4U.com
s
GENERAL DESCRIPTION
N-channel, enhancement mode field-effect power transistor using Trench technology, intended for use in off-line
switched mode power supplies, T.V. and computer monitor power supplies, d.c. to d.c. converters, motor control circuits
and general purpose switching applications.
The PHX9NQ20T is supplied in the SOT186A (FPAK) conventional leaded package
PINNING
SOT186A (FPAK)
SOT186 (FPAK)
PIN DESCRIPTION
1 gate
case
case
2 drain
3 source
case isolated
12 3
12 3
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
VDSS
VDGR
VGS
ID
IDM
PD
Tj, Tstg
Drain-source voltage
Drain-gate voltage
Gate-source voltage
Continuous drain current
Pulsed drain current
Total power dissipation
Operating junction and
storage temperature
Tj = 25 ˚C to 175˚C
Tj = 25 ˚C to 175˚C; RGS = 20 k
Ths = 25 ˚C; VGS = 10 V
Ths = 100 ˚C; VGS = 10 V
Ths = 25 ˚C
Ths = 25 ˚C
MIN.
-
-
-
-
-
-
-
- 55
MAX.
200
200
± 20
5.2
3.3
21
25
150
UNIT
V
V
V
A
A
A
W
˚C
November 2000
1
Rev 1.100




9NQ20T pdf, 반도체, 판매, 대치품
Philips Semiconductors
N-channel TrenchMOStransistor
Product specification
PHX9NQ20T , PHF9NQ20T
120 PD%
110
Normalised Power Derating
with heatsink compound
100
90
80
70
60
50
40
www.DataSheet4U.com30
20
10
0
0 20 40 60 80 100 120 140
Ths / C
Fig.1. Normalised power dissipation.
PD% = 100PD/PD 25 ˚C = f(Tmb)
ID%
120
110
Normalised Current Derating
with heatsink compound
100
90
80
70
60
50
40
30
20
10
0
0 20 40 60 80 100 120 140
Ths / C
Fig.2. Normalised continuous drain current.
ID% = 100ID/ID 25 ˚C = f(Tmb); VGS 10 V
Peak Pulsed Drain Current, IDM (A)
100
RDS(on) = VDS/ ID
10
tp = 10 us
100us
1 1 ms
D.C.
10 ms
100 ms
0.1
1
10 100
Drain-Source Voltage, VDS (V)
1000
Fig.3. Safe operating area
ID & IDM = f(VDS); IDM single pulse; parameter tp
Transient thermal impedance, Zth j-a (K/W)
10
D = 0.5
0.2
1
0.1
0.05
0.02
0.1
single pulse
0.01
1E-06 1E-05 1E-04 1E-03 1E-02 1E-01 1E+00 1E+01
Pulse width, tp (s)
Fig.4. Transient thermal impedance.
Zth j-mb = f(t); parameter D = tp/T
10 Drain Current, ID (A)
Tj = 25 C
9
8
7
VGS = 10V
8V
6V
5.5 V
6
5
4 5V
3
2 4.5 V
1
0
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
Drain-Source Voltage, VDS (V)
Fig.5. Typical output characteristics, Tj = 25 ˚C.
ID = f(VDS)
Drain-Source On Resistance, RDS(on) (Ohms)
0.5
0.45
4.5 V
5V
Tj = 25 C
0.4
0.35
0.3 5.5 V
0.25
6V
0.2
0.15
VGS = 10V
0.1 8 V
0.05
0
0 1 2 3 4 5 6 7 8 9 10
Drain Current, ID (A)
Fig.6. Typical on-state resistance, Tj = 25 ˚C.
RDS(ON) = f(ID)
November 2000
4
Rev 1.100

4페이지










9NQ20T 전자부품, 판매, 대치품
Philips Semiconductors
N-channel TrenchMOStransistor
Product specification
PHX9NQ20T , PHF9NQ20T
MECHANICAL DATA
Dimensions in mm
Net Mass: 2 g
Plastic single-ended package; isolated heatsink mounted; 1 mounting hole; 3 lead TO-220
www.DataSheet4U.com
D1
D
E
P
q
T
L2
b1
L b2
123
b
e
e1
L1
wM
A
A1
j
K
Q
c
SOT186A
0 5 10 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT A A1 b b1 b2 c D D1 E e e1 j
mm
4.6 2.9
4.0 2.5
0.9
0.7
1.1
0.9
1.4
1.2
0.7
0.4
15.8
15.2
6.5
6.3
10.3
9.7
2.54
5.08
2.7
2.3
K
L
L1
L2(1)
max.
P
0.6 14.4 3.30
0.4 13.5 2.79
3
3.2
3.0
Q
2.6
2.3
Notes
1. Terminal dimensions within this zone are uncontrolled. Terminals in this zone are not tinned.
2. Both recesses are 2.5 × 0.8 max. depth
OUTLINE
VERSION
IEC
REFERENCES
JEDEC
EIAJ
EUROPEAN
PROJECTION
SOT186A
TO-220
q T(2) w
3.0
2.6
2.5
0.4
ISSUE DATE
97-06-11
Fig.16. SOT186A; The seating plane is electrically isolated from all terminals.
Notes
1. Observe the general handling precautions for electrostatic-discharge sensitive devices (ESDs) to prevent
damage to MOS gate oxide.
2. Refer to mounting instructions for F-pack envelopes.
3. Epoxy meets UL94 V0 at 1/8".
November 2000
7
Rev 1.100

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