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부품번호 | 9N50C 기능 |
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기능 | FQI9N50C | ||
제조업체 | Fairchild Semiconductor | ||
로고 | |||
전체 9 페이지수
FQB9N50C/FQI9N50C
500V N-Channel MOSFET
QFET TM
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for high efficiency switched mode power supplies,
active power factor correction, electronic lamp ballasts
based on half bridge topology.
Features
• 9 A, 500V, RDS(on) = 0.8 Ω @VGS = 10 V
• Low gate charge ( typical 28 nC)
• Low Crss ( typical 24 pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
D
GS
D2-PAK
FQB Series
GDS
I2-PAK
FQI Series
D
!
"
!"
G!
"
"
!
S
Absolute Maximum Ratings TC = 25°C unless otherwise noted
Symbol
VDSS
ID
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IDM
VGSS
EAS
IAR
EAR
dv/dt
PD
TJ, TSTG
TL
Parameter
Drain-Source Voltage
Drain Current
- Continuous (TC = 25°C)
- Continuous (TC = 100°C)
Drain Current - Pulsed
(Note 1)
Gate-Source Voltage
Single Pulsed Avalanche Energy
(Note 2)
Avalanche Current
(Note 1)
Repetitive Avalanche Energy
(Note 1)
Peak Diode Recovery dv/dt
(Note 3)
Power Dissipation (TC = 25°C)
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
Thermal Characteristics
Symbol
RθJC
RθJA
RθJA
Parameter
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient *
Thermal Resistance, Junction-to-Ambient
FQB9N50C/FQI9N50C
500
9
5.4
36
± 30
360
9
13.5
4.5
135
1.07
-55 to +150
300
Typ Max
-- 0.93
-- 40
-- 62.5
Units
V
A
A
A
V
mJ
A
mJ
V/ns
W
W/°C
°C
°C
Units
°C/W
°C/W
°C/W
©2003 Fairchild Semiconductor Corporation
Rev. A, August 2003
Typical Characteristics (Continued)
1.2
1.1
1.0
0.9
0.8
-100
※ Notes :
1. VGS = 0 V
2. I = 250 μ A
D
-50 0
50 100 150
T , Junction Temperature [oC]
J
200
Figure 7. Breakdown Voltage Variation
vs Temperature
102
101
100
10-1
100
Operation in This Area
is Limited by R
DS(on)
10 µs
100 µs
1 ms
10 ms
100 ms
DC
※ Notes :
1. TC = 25 oC
2. TJ = 150 oC
3. Single Pulse
101 102
VDS, Drain-Source Voltage [V]
103
www.DataSheet4U.com Figure 9. Maximum Safe Operating Area
3.0
2.5
2.0
1.5
1.0
0.5
0.0
-100
※ Notes :
1. VGS = 10 V
2. ID = 4.5 A
-50 0 50 100 150
T , Junction Temperature [oC]
J
200
Figure 8. On-Resistance Variation
vs Temperature
10
8
6
4
2
0
25 50 75 100 125 150
T , Case Temperature [℃]
C
Figure 10. Maximum Drain Current
vs Case Temperature
100
D =0 .5
1 0 -1
0 .2
0 .1
0 .0 5
0 .0 2
0 .0 1
1 0 -2
s in g le p u lse
※ N o te s :
1 . Z θ J C( t ) = 0 . 9 3 ℃ / W M a x .
2 . D u ty F ac to r, D = t1/t2
3 . T J M - T C = P D M * Z θ J C( t )
PDM
t1
t2
1 0 -5
1 0 -4
1 0 -3
1 0 -2
1 0 -1
100
t , S q u a re W a ve P u ls e D u ra tio n [s e c ]
1
101
Figure 11. Transient Thermal Response Curve
©2003 Fairchild Semiconductor Corporation
Rev. A, August 2003
4페이지 Package Dimensions
9.90 ±0.20
D2PAK
4.50 ±0.20
1.30
+0.10
–0.05
1.27 ±0.10
2.54 TYP
0.80 ±0.10
2.54 TYP
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10.00 ±0.20
0.10 ±0.15
2.40 ±0.20
0°~3°
0.50
+0.10
–0.05
10.00 ±0.20
(8.00)
(4.40)
(2XR0.45)
©2003 Fairchild Semiconductor Corporation
0.80 ±0.10
Dimensions in Millimeters
Rev. A, August 2003
7페이지 | |||
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부품번호 | 상세설명 및 기능 | 제조사 |
9N50 | N-CHANNEL POWER MOSFET | Unisonic Technologies |
9N50 | N-Channel MOSFET Transistor | Inchange Semiconductor |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |