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LP173WF3-SLB3 데이터시트 PDF




LG에서 제조한 전자 부품 LP173WF3-SLB3은 전자 산업 및 응용 분야에서
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부품번호 LP173WF3-SLB3 기능
기능 FHD TFT LCD
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LP173WF3-SLB3 데이터시트, 핀배열, 회로
Product Specification
SPECIFICATION
FOR
APPROVAL
LP173WF3
Liquid Crystal Display
( ) Preliminary Specification
( ) Final Specification
Title
BUYER
MODEL
17.3” FHD TFT LCD
SUPPLIER
LG Display Co., Ltd.
*MODEL
LP173WF3
Suffix
SLB3
*When you obtain standard approval,
please use the above model name without suffix
APPROVED BY
/
/
/
SIGNATURE
APPROVED BY
SIGNATURE
S. R. Kim / S.Manager
REVIEWED BY
M. J. Lee / S.Manager
PREPARED BY
S. I. Joo / Engineer
J. P. Lee / Engineer
Please return 1 copy for your confirmation with
your signature and comments.
Products Engineering Dept.
LG Display Co., Ltd
Ver. 1.1
20. Oct. 2011
1 / 34




LP173WF3-SLB3 pdf, 반도체, 판매, 대치품
Product Specification
LP173WF3
Liquid Crystal Display
1. General Description
The LP173WF3 is a Color Active Matrix Liquid Crystal Display with an integral RGB LED backlight system.
The matrix employs a-Si Thin Film Transistor as the active element. It is a transmissive type display
operating in the normally black mode. This TFT-LCD has 17.3 inches diagonally measured active display
area with Full HD resolution(1920 horizontal by 1080 vertical pixel array). Each pixel is divided into Red,
Green and Blue sub-pixels or dots which are arranged in vertical stripes. Gray scale or the brightness of the
sub-pixel color is determined with a 10-bit gray scale signal for each dot, thus, presenting a palette of more
than 1.073G(True) colors.
The LP173WF3 has been designed to apply the interface method that enables low power, high speed, low
EMI. The LP173WF3 is intended to support applications where thin thickness, low power are critical factors
and graphic displays are important. In combination with the vertical arrangement of the sub-pixels, the
LP173WF3(SLB3) characteristics provide an excellent flat display for office automation products such as
Notebook PC.
17.3 TFT-LCD Panel
(1920 X 1080)
General Features
Active Screen Size
Outline Dimension
Pixel Pitch
Pixel Format
Color Depth
Luminance, White
Power Consumption
Weight (Max.)
Display Operating Mode
Surface Treatment
Ver. 1.1
17.3 inches diagonal
398.1 (H, Typ) × 234.3 (V, Typ) × 7.2(D, Max) mm
0.199mm × 0.199 mm
1920 horiz. by 1080 vert. Pixels RGB strip arrangement
10-bit, 1.073G colors
300 cd/m2(Typ.), 5 point
18.2W (Typ.) [4.10W (Logic, Typ.) + 14.1W (B/L, Typ.)]
830g
Transmissive mode, Normally black
Hard coating(3H), Anti-Glare treatment of the front polarizer
20. Oct. 2011
4 / 34

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LP173WF3-SLB3 전자부품, 판매, 대치품
Product Specification
LP173WF3
Liquid Crystal Display
3-2. Interface Connections
This LCD employs two interface connections, a 50 pin connector is used for the module electronics interface
and the other connector is used for the integral backlight system.
Table 3. MODULE CONNECTOR PIN CONFIGURATION (CN1)
Pin Symbol
Description
1
GND
Ground
2
AVDD
Power Supply, 3.3V Typ.
3
AVDD
Power Supply, 3.3V Typ.
4
AVDD
Power Supply, 3.3V Typ.
5
AVDD
Power Supply, 3.3V Typ.
6
AVDD
Power Supply, 3.3V Typ.
7
AVDD
Power Supply, 3.3V Typ.
8
AVDD
Power Supply, 3.3V Typ.
9
DVDD
Digital Power supply (3.3V Typ)
10
DVDD
Digital Power supply (3.3V Typ)
11
BIST
BIST
12
Clk EEDID
Two wire serial interface clock
13 DATA EEDID Two wire serial interface data
14
GND
Ground
15
RXinO0-
- LVDS differential data input, Chan 0-Odd
16
RXinO0+
+ LVDS differential data input, Chan 0-Odd
17
GND
Ground
18
RXinO1
- LVDS differential data input, Chan 1-Odd
19
RXinO1+
+ LVDS differential data input, Chan 1-Odd
20
GND
Ground
21
RXinO2-
- LVDS differential data input, Chan 2-Odd
22
RXinO2+
+ LVDS differential data input, Chan 2-Odd
23
GND
Ground
24
RXOC-
- LVDS Differential Clock input (Odd)
25
RXOC+
+ LVDS Differential Clock input (Odd)
26
GND
Ground
27
RXinO3-
- LVDS differential data input, Chan 3-Odd
28
RXinO3+
+ LVDS differential data input, Chan 3-Odd
29
GND
Ground
30
RXinO4-
- LVDS differential data input, Chan 4-Odd
31
RXinO4+
+ LVDS differential data input, Chan 4-Odd
32
GND
Ground
33
RXinE0-
- LVDS differential data input, Chan 0-Even
34
RXinE0+
+ LVDS differential data input, Chan 0-Even
35
GND
Ground
36
RXinE1-
- LVDS differential data input, Chan 1-Even
37
RXinE1+
+ LVDS differential data input, Chan 1-Even
38
GND
Ground
39
RXinE2-
- LVDS differential data input, Chan 2-Even
40
RXinE2+
+ LVDS differential data input, Chan 2-Even
41
GND
Ground
42
RXEC-
- LVDS Differential Clock input (Even)
43
RXEC+
+ LVDS Differential Clock input (Even)
44
GND
Ground
45
RXinE3-
- LVDS differential data input, Chan 3-Even
46
RXinE3+
+ LVDS differential data input, Chan 3-Even
47
GND
Ground
48
RXinE4-
- LVDS differential data input, Chan 4-Even
49
RXinE4+
+ LVDS differential data input, Chan 4-Even
50
GND
Ground
Notes
1, Interface chips
1.1 LCD : LGE (MAKO)
including LVDS Receiver,
VESA LVDS 10bit Format
1.2 System :
* Pin to Pin compatible with LVDS
2.Connector
2.1 LCD : JAE FI-VHP50S-A-HF11
or equivalent
2.2 Mating: JAE or equivalent
2.3 Connector pin arrangement
LCD rear view
1 50
[LCD Module Rear View]
Ver. 1.1
20. Oct. 2011
7 / 34

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