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FAN53555 PDF 데이터시트 : 부품 기능 및 핀배열

부품번호 FAN53555
기능 Digitally Programmable TinyBuck Regulator
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FAN53555 데이터시트, 핀배열, 회로
January 2015
FAN53555
5 A, 2.4 MHz, Digitally Programmable TinyBuck® Regulator
Features
Fixed-Frequency Operation: 2.4 MHz
Best-in-Class Load Transient
Continuous Output Current Capability: 5 A
Pulse Current Capability: 6.5 A (05 Option)
2.5 V to 5.5 V Input Voltage Range
Digitally Programmable Output Voltage:
- 00/01/03/05/08/18 Options: 0.6-1.23 V in 10 mV Steps
- 04/042/09/ Options: 0.603-1.411 V in 12.826 mV Steps
- 23 Option: 0.60-1.3875 V in 12.5 mV Steps
- 24 Option: 0.603-1.420 V in 12.967 mV Steps
- 13 Option: 0.8-1.43 V in 10 mV Steps
Programmable Slew Rate for Voltage Transitions
I2C-Compatible Interface Up to 3.4 Mbps
PFM Mode for High Efficiency in Light Load
Quiescent Current in PFM Mode: 60 µA (Typical)
Internal Soft-Start
Input Under-Voltage Lockout (UVLO)
Thermal Shutdown and Overload Protection
20-Bump Wafer-Level Chip Scale Package (WLCSP)
Applications
Application, Graphic, and DSP Processors
- ARM, Krait, OMAP™, NovaThor, ARMADA
Hard Disk Drives
Tablets, Netbooks, Ultra-Mobile PCs
Smart Phones
Gaming Devices
All trademarks are the property of their respective owners.
© 2010 Fairchild Semiconductor Corporation
FAN53555 • Rev. 1.13
Description
The FAN53555 is a step-down switching voltage regulator
that delivers a digitally programmable output from an input
voltage supply of 2.5 V to 5.5 V. The output voltage is
programmed through an I2C interface capable of operating up
to 3.4 MHz.
Using a proprietary architecture with synchronous
rectification, the FAN53555 is capable of delivering 5 A
continuous at over 80% efficiency, while maintaining over
80% efficiency at load currents as low as 10 mA. Pulse
currents as high as 6.5 A can be supported by the 05 option.
The regulator operates at a nominal fixed frequency of
2.4 MHz, which reduces the value of the external components
to 330 nH for the output induction and as low as 20 µF for the
output capacitor. Additional output capacitance can be added
to improve regulation during load transients without affecting
stability. Inductance up to 1.2 µH may be used with additional
output capacitance.
At moderate and light loads, Pulse Frequency Modulation
(PFM) is used to operate in Power-Save Mode with a typical
quiescent current of 60 µA. Even with such a low quiescent
current, the part exhibits excellent transient response during
large load swings. At higher loads, the system automatically
switches to fixed-frequency control, operating at 2.4 MHz. In
Shutdown Mode, the supply current drops below 1 µA,
reducing power consumption. PFM Mode can be disabled if
constant frequency is desired. The FAN53555 is available in a
20-bump, 1.6 x 2 mm, WLCSP.
EN
SDA
SCL
VSEL
PVIN
CIN1
CIN
FAN53555
VOUT
SW L1
COUT
GND
AGND
VDD
Core
Processor
(System Load)
GND
Figure 1. Typical Application
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FAN53555 pdf, 반도체, 판매, 대치품
Layout
Figure 2. Reduced-Footprint Layout
Pin Configuration
VSEL*
A1
SDA
B1
EN SCL
A2 A3
B2 B3
GND
VOUT
A4
AGND
B4
C1 C2
VIN
D1 D2
C3 C4
SW
D3 D4
E1 E2 E3 E4
Figure 3. Top View
A4 A3 A2 A1
B4 B3 B2 B1
C4 C3 C2 C1
D4 D3 D2 D1
E4 E3 E2 E1
A1 = VSEL for 00, 01, 04, 05, 08, 09, 13, 18, 23, 24
A1 = PGOOD for 03
Figure 4. Bottom View
Pin Definitions
Pin # Name
Description
A1
VSEL
(Except -
03 Option)
Voltage Select. When this pin is LOW, VOUT is set by the VSEL0 register. When this pin is HIGH, VOUT
is set by the VSEL1 register.
PGOOD
(03)
Power Good. This open-drain pin pulls LOW if an overload condition occurs or soft-start is in progress.
Enable. The device is in Shutdown Mode when this pin is LOW. All register values are kept during
A2
EN
shutdown. Options 00, 01, 03, 05, 08 09, 13, 18, and 23 do not reset register values when EN is raised.
The 04, 24, and 042 options reset all registers to default values when EN pin is LOW. If pulled up to a
low-impedance voltage source greater than 1.8 V, use at least 100 series resistor.
A3 SCL I2C Serial Clock
A4 VOUT VOUT. Sense pin for VOUT. Connect to COUT.
B1 SDA I2C Serial Data
B2, B3,
C1 C4
GND
Ground. Low-side MOSFET is referenced to this pin. CIN and COUT should be returned with a minimal
path to these pins.
B4
AGND
Analog Ground. All signals are referenced to this pin. Avoid routing high dV/dt AC currents through
this pin.
D1, D2,
E1, E2
VIN Power Input Voltage. Connect to the input power source. Connect to CIN with minimal path.
D3, D4,
E3, E4
SW Switching Node. Connect to the inductor.
© 2010 Fairchild Semiconductor Corporation
FAN53555 • Rev. 1.13
4
www.fairchildsemi.com

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FAN53555 전자부품, 판매, 대치품
Electrical Characteristics
Minimum and maximum values are at VIN=2.5 V to 5.5 V, TA=-40°C to +85°C, unless otherwise noted. Typical values are at
TA=25°C, VIN=5 V, and EN=HIGH.
Symbol
Parameter
Power Switch and Protection
RDS(ON)P P-Channel MOSFET On Resistance
RDS(ON)N N-Channel MOSFET On Resistance
ILIMPK P-MOS Peak Current Limit
TLIMIT Thermal Shutdown
THYST Thermal Shutdown Hysteresis
VSDWN Input OVP Shutdown
Frequency Control
fSW Oscillator Frequency
DAC
Resolution
Differential Nonlinearity(8)
Timing
I2CEN EN=HIGH to I2C Start
Soft-Start
tSS Regulator Enable to Regulated VOUT
ROFF VOUT Pull-Down Resistance, Disabled
Note:
8. Monotonicity assured by design.
Condition
Min. Typ. Max. Unit
VIN=5 V
VIN=5 V
00, 01, 03, 04, 13, 18, 23, 042
Options
05 Option
08, 24 Options
09 Option
Rising Threshold
Falling Threshold
28
17
6.3 7.4 8.5 A
8.5 10.0 11.5
5.0 5.9 6.8
4.0 4.75 5.5
150
17
6.15
5.50 5.85
A
A
°C
°C
V
V
2.05 2.40 2.75 MHz
6 Bits
0.5 LSB
100 µs
RLOAD > 5 ; to VOUT=1.2 V;
00, 01, 03, 04, 042, 05, 09, 13, and
23 Options
2.5 V ≤ VIN ≤ 4.5 V; RLOAD =2 ; to
VOUT=1.127 V with 1.1 V Pre-Bias
Voltage; 08 and 18 Options
EN=0 or VIN<VUVLO
300 µs
135 175
160
µs
Ω
© 2010 Fairchild Semiconductor Corporation
FAN53555 • Rev. 1.13
7
www.fairchildsemi.com

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