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74CBTLV3125 PDF 데이터시트 ( Data , Function )

부품번호 74CBTLV3125 기능
기능 4-bit bus switch
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74CBTLV3125 데이터시트, 핀배열, 회로
74CBTLV3125
4-bit bus switch
Rev. 3 — 15 December 2011
Product data sheet
1. General description
The 74CBTLV3125 provides a 4-bit high-speed bus switch with separate output enable
inputs (1OE to 4OE). The low on-state resistance of the switch allows connections to be
made with minimal propagation delay. The switch is disabled (high-impedance OFF-state)
when the output enable (nOE) input is HIGH.
To ensure the high-impedance OFF-state during power-up or power-down, nOE should be
tied to the VCC through a pull-up resistor. The minimum value of the resistor is determined
by the current-sinking capability of the driver.
Schmitt trigger action at control input makes the circuit tolerant to slower input rise and fall
times across the entire VCC range from 2.3 V to 3.6 V.
This device is fully specified for partial power-down applications using IOFF.
The IOFF circuitry disables the output, preventing the damaging backflow current through
the device when it is powered down.
2. Features and benefits
Supply voltage range from 2.3 V to 3.6 V
Standard ’125’-type pinout
High noise immunity
Complies with JEDEC standard:
JESD8-5 (2.3 V to 2.7 V)
JESD8-B/JESD36 (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
CDM AEC-Q100-011 revision B exceeds 1000 V
5 switch connection between two ports
Rail to rail switching on data I/O ports
CMOS low power consumption
Latch-up performance exceeds 250 mA per JESD78B Class I level A
IOFF circuitry provides partial Power-down mode operation
Multiple package options
Specified from 40 C to +85 C and 40 C to +125 C




74CBTLV3125 pdf, 반도체, 판매, 대치품
NXP Semiconductors
74CBTLV3125
4-bit bus switch
7. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min Max Unit
VCC supply voltage
VI input voltage
control inputs
VSW
switch voltage
enable and disable mode
IIK
input clamping current
VI < 0.5 V
ISK switch clamping current VI < 0.5 V
ISW switch current
VSW = 0 V to VCC
0.5
[1] 0.5
[2] 0.5
50
50
-
+4.6
+4.6
VCC + 0.5
-
-
128
V
V
V
mA
mA
mA
ICC
IGND
Tstg
Ptot
supply current
ground current
storage temperature
total power dissipation
Tamb = 40 C to +125 C
-
100
65
[3] -
+100
-
+150
500
mA
mA
C
mW
[1] The minimum input voltage rating may be exceeded if the input clamping current ratings are observed.
[2] The switch voltage ratings may be exceeded if switch clamping current ratings are observed
[3] For SSOP16 and TSSOP14 packages: Ptot derates linearly with 5.5 mW/K above 60 C.
For DHVQFN14 packages: Ptot derates linearly with 4.5 mW/K above 60 C.
8. Recommended operating conditions
Table 5.
Symbol
VCC
VI
VSW
Tamb
t/V
Recommended operating conditions
Parameter
Conditions
supply voltage
input voltage
control inputs
switch voltage
enable and disable mode
ambient temperature
input transition rise and fall rate pin nOE; VCC = 2.3 V to 3.6 V
9. Static characteristics
Min Max Unit
2.3 3.6 V
0 3.6 V
0
VCC
V
40 +125 C
0 200 ns/V
Table 6. Static characteristics
At recommended operating conditions voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Tamb = 40 C to +85 C
Min Typ[1] Max
VIH HIGH-level VCC = 2.3 V to 2.7 V
input voltage VCC = 3.0 V to 3.6 V
1.7 -
2.0 -
-
-
VIL
II
IS(OFF)
LOW-level input VCC = 2.3 V to 2.7 V
voltage
VCC = 3.0 V to 3.6 V
input leakage
current
pin nOE; VI = GND to VCC;
VCC = 3.6 V
OFF-state
VCC = 3.6 V; see Figure 6
leakage current
- - 0.7
- - 0.9
- - 1.0
- - 1
Tamb = 40 C to +125 C Unit
Min Max
1.7 - V
2.0 - V
- 0.7 V
- 0.9 V
- 20 A
- 20 A
74CBTLV3125
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 15 December 2011
© NXP B.V. 2011. All rights reserved.
4 of 17

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74CBTLV3125 전자부품, 판매, 대치품
NXP Semiconductors
74CBTLV3125
4-bit bus switch
11
RON
(Ω)
9
001aai110
11
RON
(Ω)
9
001aai111
77
(1)
5 (2)
(3)
(4)
3
0 0.5 1.0 1.5 2.0 2.5
VI (V)
(1) Tamb = 125 C.
(2) Tamb = 85 C.
(3) Tamb = 25 C.
(4) Tamb = 40 C.
Fig 10. ON resistance as a function of input voltage;
VCC = 2.5 V; ISW = 24 mA
(1)
5 (2)
(3)
(4)
3
0 0.5 1.0 1.5 2.0 2.5
VI (V)
(1) Tamb = 125 C.
(2) Tamb = 85 C.
(3) Tamb = 25 C.
(4) Tamb = 40 C.
Fig 11. ON resistance as a function of input voltage;
VCC = 2.5 V; ISW = 64 mA
8
RON
(Ω)
6
(1)
(2)
4 (3)
(4)
001aai105
8
RON
(Ω)
6
(1)
(2)
4 (3)
(4)
001aai106
2
01234
VI (V)
(1) Tamb = 125 C.
(2) Tamb = 85 C.
(3) Tamb = 25 C.
(4) Tamb = 40 C.
Fig 12. ON resistance as a function of input voltage;
VCC = 3.3 V; ISW = 15 mA
2
01234
VI (V)
(1) Tamb = 125 C.
(2) Tamb = 85 C.
(3) Tamb = 25 C.
(4) Tamb = 40 C.
Fig 13. ON resistance as a function of input voltage;
VCC = 3.3 V; ISW = 24 mA
74CBTLV3125
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 15 December 2011
© NXP B.V. 2011. All rights reserved.
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74CBTLV3125

4-bit bus switch

NXP
NXP
74CBTLV3126

4-bit Bus Switch

NXP
NXP

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