Datasheet.kr   

74VHCT02-Q100 PDF 데이터시트 ( Data , Function )

부품번호 74VHCT02-Q100 기능
기능 Quad 2-input NOR gate
제조업체 NXP Semiconductors
로고 NXP Semiconductors 로고 


이 페이지 하단에 미리보기 및 74VHCT02-Q100 다운로드 (pdf 파일) 링크가 있습니다.




전체 15 페이지

No Preview Available !

74VHCT02-Q100 데이터시트, 핀배열, 회로
74VHC02-Q100; 74VHCT02-Q100
Quad 2-input NOR gate
Rev. 1 — 15 November 2013
Product data sheet
1. General description
The 74VHC02-Q100; 74VHCT02-Q100 are high-speed Si-gate CMOS devices and are
pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance
with JEDEC standard No. 7-A.
The 74VHC02-Q100; 74VHCT02-Q100 provide a quad 2-input NOR function.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from 40 C to +85 C and from 40 C to +125 C
Balanced propagation delays
All inputs have a Schmitt-trigger action
Inputs accept voltages higher than VCC
Input levels:
The 74VHC02-Q100 operates with CMOS input level
The 74VHCT02-Q100 operates with TTL input level
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )
Multiple package options
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range Name
Description
Version
74VHC02D-Q100 40 C to +125 C SO14
74VHCT02D-Q100
plastic small outline package; 14 leads;
body width 3.9 mm
SOT108-1
74VHC02PW-Q100 40 C to +125 C TSSOP14 plastic thin shrink small outline package; 14 leads; SOT402-1
74VHCT02PW-Q100
body width 4.4 mm
74VHC02BQ-Q100 40 C to +125 C
74VHCT02BQ-Q100
DHVQFN14 plastic dual in-line compatible thermal enhanced SOT762-1
very thin quad flat package; no leads; 14 terminals;
body 2.5 3 0.85 mm




74VHCT02-Q100 pdf, 반도체, 판매, 대치품
NXP Semiconductors
74VHC02-Q100; 74VHCT02-Q100
Quad 2-input NOR gate
7. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min Max Unit
VCC supply voltage
VI input voltage
IIK input clamping current VI < 0.5 V
IOK output clamping current VO <0.5 V or VO > VCC + 0.5 V
IO output current
VO =0.5 V to (VCC + 0.5 V)
0.5
0.5
[1] 20
[1] 20
25
+7.0
+7.0
-
+20
+25
V
V
mA
mA
mA
ICC
IGND
Tstg
Ptot
supply current
ground current
storage temperature
total power dissipation
Tamb = 40 C to +125 C
-
75
65
[2] -
+75
-
+150
500
mA
mA
C
mW
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For SO14 packages: above 70 C the value of Ptot derates linearly at 8 mW/K.
For TSSOP14 packages: above 60 C the value of Ptot derates linearly at 5.5 mW/K.
For DHVQFN14 packages: above 60 C the value of Ptot derates linearly at 4.5 mW/K.
8. Recommended operating conditions
Table 5. Operating conditions
Symbol Parameter
74VHC02-Q100
VCC
VI
VO
Tamb
t/V
supply voltage
input voltage
output voltage
ambient temperature
input transition rise and fall rate
74VHCT02-Q100
VCC
VI
VO
Tamb
t/V
supply voltage
input voltage
output voltage
ambient temperature
input transition rise and fall rate
Conditions
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
VCC = 4.5 V to 5.5 V
Min Typ Max Unit
2.0 5.0 5.5 V
0-
5.5 V
0-
VCC
V
40
+25
+125
C
- - 100 ns/V
- - 20 ns/V
4.5 5.0 5.5 V
0-
5.5 V
0-
VCC
V
40
+25
+125
C
- - 20 ns/V
74VHC_VHCT02_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 15 November 2013
© NXP B.V. 2013. All rights reserved.
4 of 15

4페이지










74VHCT02-Q100 전자부품, 판매, 대치품
NXP Semiconductors
74VHC02-Q100; 74VHCT02-Q100
Quad 2-input NOR gate
Table 7. Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V); for test circuit, see Figure 7.
Symbol Parameter Conditions
25 C
40 C to +85 C 40 C to +125 C Unit
Min Typ[1] Max Min
Max
Min
Max
74VHCT02-Q100; VCC = 4.5 V to 5.5 V
tpd propagation nA, nB to nY; see Figure 6 [2]
delay
CL = 15 pF
- 3.8 5.5 1.0
6.5
1.0
7.0 ns
CL = 50 pF
- 5.1 7.5 1.0
8.5
1.0
9.5 ns
CPD power
CL = 50 pF; fi = 1 MHz;
[3] - 8.0 -
-
-
-
- pF
dissipation VI = GND to VCC
capacitance
[1] Typical values are measured at nominal supply voltage (VCC = 3.3 V and VCC = 5.0 V).
[2] tpd is the same as tPLH and tPHL.
[3] CPD is used to determine the dynamic power dissipation (PD in W).
PD = CPD VCC2 fi N + (CL VCC2 fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
(CL VCC2 fo) = sum of the outputs.
11. Waveforms
VI
nA, nB input
GND
VOH
nY output
VOL
VM
tPLH
VM
tPHL
001aah085
Fig 6.
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Input to output propagation delays
Table 8. Measurement points
Type
74VHC02-Q100
74VHCT02-Q100
Input
VM
0.5VCC
1.5 V
Output
VM
0.5VCC
0.5VCC
74VHC_VHCT02_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 15 November 2013
© NXP B.V. 2013. All rights reserved.
7 of 15

7페이지


구       성총 15 페이지
다운로드[ 74VHCT02-Q100.PDF 데이터시트 ]


 
구매 문의
일반 IC 문의 : 샘플 및 소량 구매
-----------------------------------------------------------------------

전력 반도체 판매 ( IGBT, TR 모듈, SCR, 다이오드 모듈 )

상호 : 아이지 인터내셔날

사이트 방문 : [ 홈페이지 ] [ 블로그 1 ] [ 블로그 2 ]


 

관련 데이터시트

부품번호상세설명 및 기능제조사
74VHCT02-Q100

Quad 2-input NOR gate

NXP Semiconductors
NXP Semiconductors

DataSheet.kr    |   2020   |  연락처   |  링크모음   |   검색  |   사이트맵