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ST7262xxx

Low speed USB 8-bit MCU with 3 endpoints, Flash or

ROM memory, LVD, WDG, 10-bit ADC, 2 timers, SCI, SPI

Features

■ Memories

– 8 or 16 Kbyte Program memory

(ROM or Dual voltage FLASH)

with read-write protection

– In-Application and In-Circuit Programming for

FLASH versions

– 384 to 768 bytes RAM (128-byte stack)

■ Clock, Reset and Supply Management

– Enhanced Reset System (Power On Reset)

– Low Voltage Detector (LVD)

– Clock-out capability

– 6 or 12 MHz Oscillator (8, 4, 2, 1 MHz internal

frequencies)

– 3 Power saving modes

■ USB (Universal Serial Bus) Interface

– DMA for low speed applications compliant

with USB specification (version 2.0):

– Integrated 3.3V voltage regulator and trans-

ceivers

– Suspend and Resume operations

– 3 Endpoints

■ Up to 31 I/O Ports

– Up to 31 multifunctional bidirectional I/O lines

– Up to 12 External interrupts (3 vectors)

– 13 alternate function lines

– 8 high sink outputs

(8 mA@0.4 V/20 mA@1.3 V)

– 2 true open drain pins (N buffer 8 mA@0.4 V)

■ 3 Timers

– Configurable watchdog timer (8 to 500 ms

timeout)

– 8-bit Auto Reload Timer (ART) with 2 Input

Captures, 2 PWM outputs and External Clock

– 8-bit Time Base Unit (TBU) for generating pe-

riodic interrupts cascadable with ART

Device Summary

SO20

PDIP20

SO34 shrink

PDIP32 shrink

LQFP44

PDIP42 shrink

■ Analog Peripheral

– 10-bit A/D Converter with up to 8 input pins.

■ 2 Communications Interfaces

– Asynchronous Serial Communication inter-

face

– Synchronous Serial Peripheral Interface

■ Instruction Set

– 8-bit data manipulation

– 63 basic instructions

– 17 main addressing modes

– 8 x 8 unsigned multiply instruction

– True bit manipulation

■ Nested interrupts

■ Development Tools

– Full hardware/software development package

Features

Program memory - Kbytes

RAM (stack) - bytes

Peripherals

Serial I/O

I/Os

Operating Supply

Operating Temperature

Packages

ST72623F2

ST72621K4

ST72622L2

ST72621L4

ST72621J4

8 16 8 16 16

384 (128)

768 (128)

384 (128)

768 (128)

768 (128)

USB, Watchdog, Low Voltage Detector, 8-bit Auto-Reload timer, Timebase unit, A/D Converter

-

SPI + SCI

SPI

SPI + SCI

11 21 23 31

4.0V to 5.5V (Low voltage 3.0V to 5.5V ROM versions available)

0°C to +70°C

PDIP20/SO20

PDIP32

SO34

PDIP42/LQFP44

June 2009

Doc ID 6996 Rev 5

1/139

1

ST7262xxx

1 INTRODUCTION

The ST7262 and ST72F62 devices are members

of the ST7 microcontroller family designed for USB

applications.

All devices are based on a common industry-

standard 8-bit core, featuring an enhanced instruc-

tion set.

The ST7262 devices are ROM versions.

The ST72F62 versions feature dual-voltage

FLASH memory with FLASH Programming capa-

bility.

consumption when the application is in idle or

standby state.

The enhanced instruction set and addressing

modes of the ST7 offer both power and flexibility to

software developers, enabling the design of highly

efficient and compact application code. In addition

to standard 8-bit data management, all ST7 micro-

controllers feature true bit manipulation, 8x8 un-

signed multiplication and indirect addressing

modes.

Under software control, all devices can be placed

in WAIT, SLOW, or HALT mode, reducing power

Figure 1. General Block Diagram

OSCIN

OSCOUT

VDD

VSS

RESET

VDDA

VSSA

VPP

Internal

CLOCK

OSCILLATOR

LVD

POWER

SUPPLY

CONTROL

8-BIT CORE

ALU

USB DMA

PROGRAM

MEMORY

(8 or 16K Bytes)

RAM

(384,

or 768 Bytes)

10-BIT ADC

PORT A

SCI

PORT B

PWM ART

TIME BASE UNIT

USB SIE

PORT C

SPI

PORT D

WATCHDOG

PA7:0

(8 bits)

PB7:0

(8 bits)

USBDP

USBDM

USBVCC

PC7:0

(8 bits)

PD6:0

(7 bits)

4/139

1

Doc ID 6996 Rev 5

ST7262xxx

Figure 4. 20-pin SO20 Package Pinout

IT3 / AIN2 / PA2

IT2 / AIN1 / PA1

USBOE/ IT1 / AIN0/ PA0

VSS

USBDM

USBDP

USBVCC

VDD

VPP

RESET

1

2

3

4

5

6

7

8

9

10

20 PB0 (HS) / MCO

19 PB1 (HS)

18 PB2 (HS)

17 PB3 (HS) / ARTCLK

16 PB4 (HS) / ARTIC1 / IT5

15 PB5 (HS) / ARTIC2 / IT6 / ICCCLK

14 PB6 (HS) / PWM0 / IT7/ ICCDATA

13 PB7 (HS) / PWM1 / IT8

12 OSCOUT

11 OSCIN

Figure 5. 20-pin DIP20 Package Pinout

IT5 / ARTIC1 / PB4 (HS)

ARTCLK / PB3 (HS)

PB2 (HS)

PB1 (HS)

MCO / PB0 (HS)

IT3 / AIN2 / PA2

IT2 / AIN1/ PA1

USBOE / IT1 / AIN0 / PA0

VSS

USBDM

1

2

3

4

5

6

7

8

9

10

20 PB5 (HS) / ARTIC2 / IT6 / ICCCLK

19 PB6 (HS) / PWM0 / IT7/ICCDATA

18 PB7 (HS) / PWM1 / IT8

17 OSCOUT

16 OSCIN

15 RESET

14 VPP

13 VDD

12 USBVCC

11 USBDP

Doc ID 6996 Rev 5

7/139

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