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PDF ADAM27P08 Data sheet ( Hoja de datos )
| Número de pieza | ADAM27P08 | |
| Descripción | 4-BIT SINGLE CHIP MICROCOMPUTERS | |
| Fabricantes | ABOV | |
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July 10, 2012 Ver 1.1
4-BIT SINGLE CHIP MICROCOMPUTERS
ADAM27PXX
USER`S MANUAL
• ADAM27P08
• ADAM27P16
1 page  
ADAM27PXX
1. Overview
1.5. Pin Function
PIN
NAME
INPUT
OUTPUT
FUNCTION
@RESET
@STOP
K0 ~ K3
R0 ~ R2
-. 4-bit I/O port. (Input mode is set only when each of
them output `H`)
-. Each pin has STOP mode release function
Key-Strobe
in input mode.
(at T-key Scan)
-. Output mode is set when each of them output `L`.
Input
or
I/O
-. When used as `output`, each pin can be set and
(with Pull-up) Keep status
reset independently.
Before STOP
-. When set as the input mode, input state of pin is
(at M-key Scan)
read. At output mode, if port is read, data register
is read instead of the state of pin.
P0 ~ P3
-. 4-bit I/O port. (Input mode is set only when each of
them output `H`)
-. Each pin has STOP mode release function
in input mode.
Key-Strobe
-. Output mode is set when each of them output `L`.
(at T-key Scan)
-. When used as `output`, each pin can be set and
Input
I/O or
reset independently.
(with Pull-up)
Low
-. When T-key Scan is disabled, P0~P3 are forcibly
(at M-key Scan)
Low output at STOP mode.
-. When set as the input mode, input state of pin is
read. At output mode, if port is read, data register
is read instead of the state of pin.
-. 2-bit I/O port. (Input mode is set only when each of
them output `H` and pull-up is enabled.)
-. Pull-ups can be enabled by user program.
-. Output mode is set when each of them output `L`,
or when it’s pull-up is disabled.
CS0~CS1
I/O
-. When used as `output`, each pin can be set and
Keep status
Hi-Z
before STOP
reset independently.
-. When set as the input mode, input state of pin is
read. At output mode, if port is read, data register
is read instead of the state of pin.
ROUT
-. High Current Pulse Output.
Output
-. N-ch open drain output.
Hi-Z Hi-Z
VDD
GND
Power -. Positive power supply.
Power -. Ground
--
--
Page 4 of 36
5 Page 
ADAM27PXX
2. Architecture
2.2. Address Register
The following registers are used to address the ROM.
• Block address register (BA) :
Holds ROM's Block number (0~1h) to be addressed.
• Block buffer register (BB) :
Value of BB is loaded by an LBBY command when newly addressing a block.
Then it is shifted into the BA when rightly executing a branch instruction (BR)
and a subroutine call (CAL).
• Page address register (PA) :
Holds ROM's page number (0~Fh) to be addressed.
• Page buffer register (PB) :
Value of PB is loaded by an LPBI command when newly addressing a page.
Then it is shifted into the PA when rightly executing a branch instruction (BR)
and a subroutine call (CAL).
• Program counter (PC) :
Available for addressing word on each page.
• Stack register (SR) :
Stores returned-word address in the subroutine call mode.
2.2.1. Block address register and Block buffer register :
Address one of block #0 to #1 in the ROM by the 1-bit register.
Unlike the program counter, the block address register is not changed automatically.
To change the block address, take two steps such as
(1) writing in the block buffer what block to jump (execution of LBBY) and
(2) execution of BR or CAL, because instruction code is of eight bits so that block
can not be specified at the same time.
In case a return instruction (RTN) is executed within the subroutine that has been
called in the other block, the block address will be changed at the same time.
Page 10 of 36
11 Page | ||
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