CEB01N6G 데이터시트 PDF

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CEP01N6G/CEB01N6G

CEF01N6G

N-Channel Enhancement Mode Field Effect Transistor

FEATURES

Type

CEP01N6G

CEB01N6G

CEF01N6G

VDSS

600V

600V

600V

RDS(ON)

9.3Ω

9.3Ω

9.3Ω

ID @VGS

1A 10V

1A 10V

1A d 10V

Super high dense cell design for extremely low RDS(ON).

High power and current handing capability.

Lead free product is acquired.

D

DG

GS

CEB SERIES

TO-263(DD-PAK)

G

D

S

CEP SERIES

TO-220

G

D

S

CEF SERIES

TO-220F

S

ABSOLUTE MAXIMUM RATINGS Tc = 25 C unless otherwise noted

Parameter

Symbol

Limit

TO-220/263

TO-220F

Drain-Source Voltage

Gate-Source Voltage

Drain Current-Continuous

Drain Current-Pulsed a

Maximum Power Dissipation @ TC = 25 C

- Derate above 25 C

VDS

VGS

ID

IDM e

PD

600

±30

1

4

41

0.33

1d

4d

27

0.22

Operating and Store Temperature Range

TJ,Tstg

-55 to 150

Thermal Characteristics

Parameter

Thermal Resistance, Junction-to-Case

Thermal Resistance, Junction-to-Ambient

Symbol

RθJC

RθJA

Limit

3

62.5

4.5

65

Units

V

V

A

A

W

W/ C

C

Units

C/W

C/W

Details are subject to change without notice .

1

Rev 1. 2009.July

http://www.cet-mos.com

CEP01N6G/CEB01N6G

CEF01N6G

10 VDS=300V

ID=1A

8

6

4

2

0

0 1.5

3 4.5

6 7.5

9

Qg, Total Gate Charge (nC)

Figure 7. Gate Charge

VDD

VIN RL

D VOUT

VGS

RGEN G

S

101

RDS(ON)Limit

100

100ms

1ms

10ms

DC

10-1

TC=25 C

TJ=150 C

10-2 Single Pulse

100 101 102 103

VDS, Drain-Source Voltage (V)

Figure 8. Maximum Safe

Operating Area

td(on)

VOUT

t on

tr

td(off)

90%

10% INVERTED

toff

tf

90%

10%

VIN

10%

50%

90%

50%

PULSE WIDTH

4

Figure 9. Switching Test Circuit

Figure 10. Switching Waveforms

100

D=0.5

10-1

0.2

0.1

0.05

0.02

0.01

Single Pulse

10-2

10-2

10-1

100 101 102

Square Wave Pulse Duration (msec)

PDM

t1

t2

1. R JC (t)=r (t) * R JC

2. R JC=See Datasheet

3. TJM-TC = P* R JC (t)

4. Duty Cycle, D=t1/t2

103

104

Figure 11. Normalized Thermal Transient Impedance Curve

4

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