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74VHC299 데이터시트 PDF




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부품번호 74VHC299 기능
기능 8-Input Universal Shift/Storage Register
제조업체 National Semiconductor
로고 National Semiconductor 로고


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74VHC299 데이터시트, 핀배열, 회로
PRELIMINARY
November 1995
74VHC299
8-Input Universal Shift Storage
Register with Common Parallel I O Pins
General Description
The VHC299 is an advanced high speed CMOS device fab-
ricated with silicon gate CMOS technology It achieves the
high-speed operation similar to equivalent Bipolar Schottky
TTL while maintaining the CMOS low power dissipation
The VHC299 is an 8-bit universal shift storage register with
TRI-STATE outputs Four modes of operation are possi-
ble hold (store) shift left shift right and load data The par-
allel load inputs and flip-flop outputs are multiplexed to re-
duce the total number of package pins Additional outputs
are provided for flip-flops Q0 Q7 to allow easy serial cas-
cading A separate active LOW Master Reset is used to
reset the register
An input protection circuit insures that 0V to 7V can be ap-
plied to the input pins without regard to the supply voltage
This device can be used to interface 5V to 3V systems and
two supply systems such as battery backup This circuit pre-
vents device destruction due to mismatched supply and in-
put voltages
Features
Y Low power dissipation
ICC e 4 mA at TA e 25 C
Y High noise immunity
VNIH e VNIL e 28% VCC (min)
Y All inputs are equipped with a power down protection
function
Y Balanced propagation delays tPLH j tPHL
Y Low noise VOLP e 0 9V (typ)
Y Pin and function compatible with 74HC299
Commercial
74VHC299M
74VHC299SJ
74VHC299MTC
74VHC299N
Package
Number
M20B
M20D
MTC20
N20A
Package Description
20-Lead Molded JEDEC SOIC
20-Lead Molded EIAJ SOIC
20-Lead Molded JEDEC Type 1 TSSOP
20-Lead Molded DIP
Note Surface mount packages are also available on Tape and Reel
Specify by appending the suffix letter ‘X’ to the ordering code
Logic Symbols
Connection Diagram
IEEE IEC
Pin Assignment for
DIP TSSOP and SOIC
TL F 11638–1
TRI-STATE is a registered trademark of National Semiconductor Corporation
C1995 National Semiconductor Corporation TL F 11638
TL F 11638 – 3
TL F 11638 – 2
RRD-B30M125 Printed in U S A




74VHC299 pdf, 반도체, 판매, 대치품
Absolute Maximum Ratings (Note 1)
Supply Voltage (VCC)
DC Input Voltage (VIN)
DC Output Voltage (VOUT)
Input Diode Current (IIK)
Output Diode Current (IOK)
DC Output Current (IOUT)
DC VCC GND Current (ICC)
Storage Temperature (TSTG)
Lead Temperature (TL)
(Soldering 10 seconds)
b0 5V to a7 0V
b0 5V to a7 0V
b0 5V to VCC a 0 5V
b20 mA
g20 mA
g25 mA
g75 mA
b65 C to a150 C
260 C
Note 1 Absolute Maximum Ratings are values beyond
which the device may be damaged or have its useful life
impaired The databook specifications should be met with-
out exception to ensure that the system design is reliable
over its power supply temperature and output input load-
ing variables National does not recommend operation out-
side databook specifications
Recommended Operating
Conditions
Supply Voltage (VCC)
Input Voltage (VIN)
Output Voltage (VOUT)
Operating Temperature (TOPR)
Input Rise and Fall Time (tr tf)
VCC e 3 3V g0 3V
VCC e 5 0V g0 5V
2 0V to a5 5V
0V to a5 5V
0V to VCC
b40 C to a85 C
0 E 100 ns V
0 E 20 ns V
DC Characteristics for ’VHC Family Devices
Symbol
Parameter
VIH High Level Input
Voltage
VIL Low Level Input
Voltage
VOH
High Level Output
Voltage
VOL Low Level Output
Voltage
IOZ TRI-STATE Output
Off-State Current
IIN Input Leakage
Current
ICC Quiescent Supply
Current
74VHC
VCC
(V)
TA e a25 C
TA e b40 C
to a85 C
Units
Conditions
Min Typ Max Min Max
2 0 1 50
3 0 – 5 5 0 7 VCC
1 50
0 7 VCC
V
20
3 0–5 5
0 50
0 3 VCC
0 50
0 3 VCC
V
20 19 20
30 29 30
45 44 45
19
29
44
VIN e VIH IOH e b50 mA
V or VIL
3 0 2 58
4 5 3 94
2 48
3 80 V
IOH e b4 mA
IOH e b8 mA
20 00 01
30 00 01
45 00 01
0 1 VIN e VIH IOL e 50 mA
01 V
or VIL
01
30
45
55
0–5 5
0 36
0 36
g0 25
g0 1
0 44
0 44
g2 5
g1 0
V IOL e 4 mA
IOL e 8 mA
mA VIN e VIH or VIL
VOUT e VCC or GND
mA VIN e 5 5V or GND
55
40
40 0
mA VIN e VCC or GND
4

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74VHC299 전자부품, 판매, 대치품
AC Operating Requirements for ’VHC Family Devices
Symbol
tS
tS
tS
tH
tH
tH
tW(L)
tW(H)
tW(L)
trem
Parameter
Minimum Setup Time
S0 or S1 to CP
Minimum Setup Time
I On to CP
Minimum Setup Time
DS0 or DS7 to CP
Minimum Hold Time
S0 or S1 to CP
Minimum Hold Time
I On to CP
Minimum Hold Time
DS0 or DS7 to CP
Minimum Pulse Width
(CP)
Minimum Pulse Width
(MR)
Minimum Removal Time
(MR to CP)
VCC
(V)
3 3 g0 3
5 0 g0 5
3 3 g0 3
5 0 g0 5
3 3 g0 3
5 0 g0 5
3 3 g0 3
5 0 g0 5
3 3 g0 3
5 0 g0 5
3 3 g0 3
5 0 g0 5
3 3 g0 3
5 0 g0 5
3 3 g0 3
5 0 g0 5
3 3 g0 3
5 0 g0 5
74VHC
74VHC
TA e a25 C
TA e b40 C
to a85 C
Typ Guaranteed Limits
14 5 17 0
70 80
80 90
40 40
8 5 10 0
50 50
00 00
05 05
05 05
15 15
10 10
10 10
70 80
70 80
60 70
60 70
50 60
40 40
Units
Conditions
ns
ns
ns
ns
ns
ns
ns
ns
ns
Ordering Information
The device number is used to form part of a simplified purchasing code where the package type and temperature range are
defined as follows
TL F 11638 – 5
7

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