ATA664151 PDF 데이터시트 : 부품 기능 및 핀배열

부품번호 ATA664151
기능 LIN System Basis Chip
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ATA664151 데이터시트, 핀배열, 회로
LIN System Basis Chip with LIN Transceiver, 5V
Regulator, Watchdog, 8-channel High Voltage Switch
Interface with High Voltage Current Sources, 16-bit SPI
8-channel HV switch interface with HV current sources
Linear low-drop voltage regulator, up to 80mA current capability, VCC = 5.0V ±2%
Fulfills the OEM “Hardware Requirements for LIN in Automotive Applications
LIN master and slave operation possible
Supply voltage up to 40V
Operating voltage VS = 5V to 27V
Internal voltage divider for VBattery sensing (±2%)
16-bit serial interface (daisy-chain-capable) for configuration and diagnosis
Typically 8µA supply current during sleep mode
Typically 35µA supply current in active low-power mode
VCC-undervoltage detection (4ms reset time) and watchdog reset logical
combined at NRES open drain output
LIN high-speed mode up to 200kBit/s
Adjustable watchdog timer via external resistor
Negative trigger input for watchdog
LIN physical layer complies with LIN 2.1 specification and SAE J2602-2
Wake-up capability via LIN bus and CL15
Bus pin is overtemperature and short-circuit protected versus GND and battery
Advanced EMC and ESD performance
Package: QFN32 5x5mm

ATA664151 pdf, 반도체, 판매, 대치품
Table 2-1. Pinning (Continued)
High-voltage current source and switch I/O pin no. 8
Supply input pin
Analog reference ground
5V Voltage regulator output pin
Watchdog trigger input from microcontroller
Back Side Heat Slug, internally connected to GND


ATA664151 전자부품, 판매, 대치품
VDIV Input/Output Pin
This pin handles two different functions. During the VCC startup and watchdog reset phase (pin NRES driven to LOW), the
pin acts as input and determines the setting of the “WDD” bit within the SPI configuration register (see Figure 3-2). In other
words, if the window watchdog operation shall be disabled directly after power-up (e.g., for microcontroller programming or
debugging purposes), pin VDIV must be tied to HIGH level until the reset phase ends (pin NRES has a positive slope from
LOW to HIGH). In other cases, such as when pin VDIV is not driven actively by the application, the signal is assessed as
LOW and the WDD bit (watchdog disable) is thus also low and the window watchdog is operational (see Figure 3-2).
Figure 3-2. WDD Configuration Bit Setup During VCC Startup
“LOW” from VCC startup
VDIV (driven externally)
Logic Level “A”
Z (high imp.)
WDD config bit state
Logic Level “A”
During normal operation this pin provides a low-voltage signal for the ADC such as for a microcontroller. It is sourced either
by the VBATT pin or one of the switch input pins CS1 to CS8. An external ceramic capacitor is recommended for low-pass
filtering of this signal. If selected in the configuration register of the SPI, this pin guarantees a voltage- and temperature-
stable output ratio of the selected test input and is available in all modes except sleep mode. Please note that the current
consumption values in the active low-power mode of Atmel® ATA664151 given in the electrical characteristics lose their
validity if the VDIV output pin is being used in this low-power mode. The voltage on this pin is actively clamped to VCC if the
input value would lead to higher values.
IREF Output Pin
This pin is the connection for an external resistor towards ground. It provides a regulated voltage which will cause a resistor-
dependent current used as reference for the current sources in the switch interface I/O ports. The resistor should be placed
closely to the pin without any additional capacitor. A fail-safe circuitry detects if the resistor is missing or if there is a short
towards ground or VCC on this pin. An internal fail-safe current is generated in this event. Please see also Section 8. “Switch
Interface Unit” on page 22 for further details.
CS1 to CS8 High-voltage Input/Output Pins
These pins are intended for contact monitoring and/or constant current sourcing. A total of eight I/Os (pins CS1 through
CS8) are available, of which three (CS1, CS2 and CS3) can be configured either as current sources (such as for switches
towards ground) or as current sinks (such as for switches towards battery). The other five pins (CS4 to CS8) have only
current sourcing capability. Apart from a high voltage (HV) comparator for simple switches, the I/Os are also equipped with a
voltage divider to enable analog voltage measurements on HV pins by using the ADC of the application’s microcontroller
(see Section 3.14 “VDIV Input/Output Pin” on page 7 for further details). Also, each input can trigger an interrupt upon state
change even during Active Low-power Mode. If one or more CSx pins are not needed, can be left open or directly connected
to VS.
Unused CSx-pins should be connected directly to VS.
PWM1..3 Input Pins
These pins can be used to control the switch interface current sources directly, such as for pulse width-modulated load
control or for pulsed switch scanning. They accept logic level signals from the microcontroller and are equipped with pull-
down structures so in case of an open connection, the input is well defined. For more information see Section 8. “Switch
Interface Unit” on page 22.
The assignment of the current sources to the three PWM input pins is described in Section 8.1 “Current Sources” on page


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부품번호상세설명 및 기능제조사

LIN System Basis Chip


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