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PDF 5812-F Data sheet ( Hoja de datos )
| Número de pieza | 5812-F | |
| Descripción | BiMOS II 20-BIT SERIAL-INPUT / LATCHED SOURCE DRIVERS | |
| Fabricantes | Allegro | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de 5812-F (archivo pdf) en la parte inferior de esta página. Total 8 Páginas | ||
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5812-F
BiMOS II 20-BIT SERIAL-INPUT, LATCHED
SOURCE DRIVERS WITH ACTIVE-DMOS PULL-DOWNS
UCN5812EPF
The UCN5812AF/EPF combine a 20-bit CMOS shift register, data
latches, and control circuitry with high-voltage bipolar source drivers and
active DMOS pull-downs for reduced supply current requirements. Although
designed primarily for vacuum-fluorescent displays, the high-voltage, high-
OUT18 5
T6
C7
U8
D Y 29
O L 110
R N 68OUT12 11
25 OUT 2
24
23
22
21
20
19 OUT8
P E O — ADwg.PP-059-1
ED NC ntABSOLUTE MAXIMUM RATINGS
eat TA = 25°C
U E mLogic Supply Voltage, VDD ..................... 15 V
IN R eDriver Supply Voltage, VBB .................... 60 V
E cContinuous Output Current Range,
T F laIOUT ................................. -40 to +15 mA
Input Voltage Range,
N E pVIN ........................ -0.3 V to VDD + 0.3 V
O R rePackage Power Dissipation, PD
(UCN5812AF) ........................... 3.12 W*
C R d(UCN5812EPF) ........................1.84 W†
eOperating Temperature Range,
IS O dTA .................................. -20°C to +85°C
Storage Temperature Range,
F nTS ................................ -55°C to +150°C
D e* Derate at rate of 22 mW/°C above TA = +25°C
— m† Derate at rate of 15 mW/°C above TA = +25°C
mCaution: Allegro CMOS devices have input static
oprotection but are susceptible to damage when
exposed to extremely high static electrical
ccharges.
ReNote that the UCN5812AF (dual in-line package)
current outputs also allow them to be used in other peripheral power driver
applications. They are improved versions of the original UCN5812A/EP.
The CMOS shift register and latches allow direct interfacing with
microprocessor-based systems. With a 5 V supply, they will operate to at
least 3.3 MHz. At 12 V, higher speeds are possible. Especially useful for
inter-digit blanking, the BLANKING input disables the output source drives
and turns on the DMOS sink drivers. Use with TTL may require the use of
appropriate pull-up resistors to ensure an input logic high.
A CMOS serial data output enables cascade connections in applications
requiring additional drive lines. Similar devices are available as the
UCN5810AF/LWF (10 bits), UCN5811A (12 bits), and UCN5818AF/EPF
(32 bits).
The output source drivers are high-voltage pnp-npn Darlingtons with a
minimum breakdown of 60 V and are capable of sourcing up to 40 mA. The
DMOS active pull-downs are capable of sinking up to 15 mA.
The UCN5812AF is supplied in a 28-pin dual in-line plastic package with
0.600" (15.24 mm) row spacing. For surface mounting, the UCN5812EPF is
furnished in 28-lead plastic chip carrier (quad pack) with 0.050"(1.22 mm)
centers. Copper lead-frames, reduced supply current requirements and lower
output saturation voltages, allow continuous operation, with all outputs
sourcing 25 mA, of the UCN5812AF over the operating temperature range,
and the UCN5812EPF up to +75°C. All devices are also available for opera-
tion between -40°C and +85°C. To order, change the prefix from ‘UCN’ to
‘UCQ’.
FEATURES
s High-Speed Source Drivers
s 60 V Source Outputs
s To 3.3 MHz Data Input Rate
s Low Output-Saturation Voltages
s Active DMOS Pull-Downs
s Reduced Supply Current
Requirements
s Improved Replacement
and UCN5812EPF (PLCC package) are electri-
s Low-Power CMOS Logic and Latches for TL5812
cally identical and share a common terminal
number assignment.
Always order by complete part number, e.g., UCN5812AF .
1 page  
28
0.580
0.485
5812-F
20-BIT SERIAL-INPUT,
LATCHED SOURCE DRIVERS
WITH ACTIVE-DMOS PULL-DOWNS
UCN5812AF
Dimensions in Inches
(controlling dimensions)
15
0.015
0.008
0.700
MAX
0.600
BSC
0.250
MAX
123
0.070
4
0.030
1.565
1.380
14
0.100
BSC
0.005
MIN
0.015
MIN
0.022
0.014
0.200
0.115
Dimensions in Millimeters
(for reference only)
28 15
Dwg. MA-003-28 in
0.381
0.204
14.73
12.32
17.78
MAX
15.24
BSC
6.35
MAX
12
1.77
0.77
3
4
39.7
35.1
14
2.54
BSC
0.13
MIN
0.39
MIN
0.558
0.356
5.08
2.93
NOTES: 1. Exact body and lead configuration at vendor’s option within limits shown.
2. Lead spacing tolerance is non-cumulative.
3. Lead thickness is measured at seating plane or below.
4. Supplied in standard sticks/tubes of 12 devices.
www.allegromicro.com
Dwg. MA-003-28 mm
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