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PDF MB88F333 Data sheet ( Hoja de datos )

Número de pieza MB88F333
Descripción Graphics Display Controller
Fabricantes Fujitsu　
Logotipo Fujitsu Logotipo



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MB88F333 LSI Product Specifications
MB88F333 'Indigo-L'
LSI Product Specifications
27th July, 2011 Edition 1.60
FUJITSU SEMICONDUCTOR
PROPRIETARY AND CONFIDENTIAL
i

1 page




MB88F333 pdf
MB88F333 LSI Product Specifications
Contents
1. OVERVIEW ................................................................................................................................... 1-1
1.1. FEATURES ......................................................................................................................................... 1-1
1.2. LIMITATIONS ..................................................................................................................................... 1-2
1.3. COMPARISON: INDIGO / INDIGO-L ..................................................................................................... 1-3
1.4. BLOCK DIAGRAM.............................................................................................................................. 1-4
1.5. FUNCTION LIST.................................................................................................................................. 1-6
1.6. PACKAGE DIMENSIONS .................................................................................................................... 1-12
1.7. PIN ASSIGNMENT (VERSION ES2 + CS)............................................................................................ 1-13
1.8. PIN ASSIGNMENT TABLE (CHIP VERSION ES2 + CS) ......................................................................... 1-14
1.9. PIN FUNCTIONS ............................................................................................................................... 1-15
1.9.1. Pin Multiplexing......................................................................................................................... 1-15
1.9.1.1. Pin multiplex group #0 ........................................................................................................................... 1-16
1.9.1.2. Pin multiplex group #1 ........................................................................................................................... 1-16
1.9.1.3. Pin multiplex group #2 ........................................................................................................................... 1-16
1.9.1.4. Pin multiplex group #3 ........................................................................................................................... 1-16
1.9.1.5. Pin multiplex group #4 ........................................................................................................................... 1-17
1.9.2. Pin functions............................................................................................................................... 1-18
1.9.2.1. Host interface related pins ...................................................................................................................... 1-19
1.9.2.2. APIX I/F related pins.............................................................................................................................. 1-19
1.9.2.3. Oscillator I/O I/F related pins ................................................................................................................. 1-19
1.9.2.4. SMC related pins .................................................................................................................................... 1-19
1.9.2.5. PWM related pins ................................................................................................................................... 1-20
1.9.2.6. GPIO related pins ................................................................................................................................... 1-20
1.9.2.7. External Interrupt related pins ................................................................................................................ 1-20
1.9.2.8. Reload timer related pins........................................................................................................................ 1-21
1.9.2.9. USART related pins................................................................................................................................ 1-21
1.9.2.10.
1.9.2.11.
ADC related pins .................................................................................................................................... 1-21
I2C related pins ....................................................................................................................................... 1-21
1.9.2.12. SOUND related pins............................................................................................................................... 1-22
1.9.2.13. Panel Interface related pins..................................................................................................................... 1-22
1.9.2.14. Supply Panel Interface related pins ........................................................................................................ 1-22
1.9.2.15. TCON related pins.................................................................................................................................. 1-22
1.9.2.16. System related pins................................................................................................................................. 1-22
1.9.2.17. Power supply related pins....................................................................................................................... 1-24
1.9.3. Unused Pins ............................................................................................................................... 1-25
1.9.3.1. I2C I/F .................................................................................................................................................... 1-25
1.9.3.2. Sound I/F ................................................................................................................................................ 1-25
1.9.3.3. SMC I/F.................................................................................................................................................. 1-25
1.9.3.4. GPIO/INT/RLT I/F ................................................................................................................................. 1-26
1.9.3.5. HOST I/F................................................................................................................................................ 1-26
1.9.3.6. USART I/F.............................................................................................................................................. 1-26
1.9.3.7. APIX I/F................................................................................................................................................. 1-26
1.9.3.8. Oscillator I/O I/F .................................................................................................................................... 1-26
1.9.3.9. Display I/F.............................................................................................................................................. 1-27
1.9.3.10. TCON I/F ............................................................................................................................................... 1-27
1.9.3.11. PWM - VPWM I/F ................................................................................................................................. 1-27
1.9.3.12. ADC I/F.................................................................................................................................................. 1-28
1.9.3.13. System related pins................................................................................................................................. 1-28
1.10. CLOCK GENERATION................................................................................................................... 1-30
FUJITSU SEMICONDUCTOR
PROPRIETARY AND CONFIDENTIAL
v

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MB88F333 arduino
MB88F333 LSI Product Specifications
9.4.4.2. DCM1 (Display Control Mode 1 Register)............................................................................................. 9-27
9.4.4.3. HTP (Horizontal Total Pixels Register) .................................................................................................. 9-28
9.4.4.4. HDP (Horizontal Display Period Register)............................................................................................. 9-28
9.4.4.5. HSP_HSW_VSW (Hor. Synchronize pulse Position + Width, Vert. Synchronize pulse Width Register)9-29
9.4.4.6. VTR (Vertical Total Raster Register)...................................................................................................... 9-30
9.4.4.7. VDP_VSP (Display_Vertical Display Period_Vertical Synchronize pulse Position Register)................ 9-30
9.4.4.8. Status (Status Register)........................................................................................................................... 9-31
9.4.4.9. Interrupt_Enable (Interrupt_Enable Register) ........................................................................................ 9-32
9.4.4.10. IDLE (IDLE Register) ............................................................................................................................ 9-33
9.4.4.11. DLS (Display Layer Select Register) ..................................................................................................... 9-33
9.4.4.12. FGBLD (ForeGround BLenD Register) ................................................................................................. 9-34
9.4.4.13. LABLD (LA BLenD Register) ............................................................................................................... 9-34
9.4.4.14. LBBLD (LB BLenD Register) ............................................................................................................... 9-35
9.4.4.15. LAETC (LA-layer Extend Transparency Control Register) ................................................................... 9-36
9.4.4.16. LBETC (LB-layer Extend Transparency Control Register).................................................................... 9-36
9.4.4.17. DFGC (Display_Fore Ground Color Register) ....................................................................................... 9-37
9.4.4.18. DBGC (Display_Back Ground Color Register)...................................................................................... 9-37
9.4.4.19. FADEC (FADE in / FADE out Control Register) ................................................................................... 9-38
9.4.4.20. AGT (Alignment Guard Time Register) ................................................................................................. 9-39
9.4.4.21. VPWMOM (Video sync PWM0 Mode Register) ................................................................................... 9-40
9.4.4.22. VPWM1M (Video sync PWM1 Mode Register) .................................................................................... 9-41
9.4.4.23. VPWM2M (Video sync PWM2 Mode Register) .................................................................................... 9-42
9.4.4.24. VPWM3M (Video sync PWM3 Mode Register) .................................................................................... 9-43
9.4.4.25. VPWM0SE (Video sync PWM0 Start End Register) ............................................................................. 9-44
9.4.4.26. VPWM1SE (Video sync PWM1 Start End Register) ............................................................................. 9-44
9.4.4.27. VPWM2SE (Video sync PWM2 Start End Register) ............................................................................. 9-45
9.4.4.28. VPWM3SE (Video sync PWM3 Start End Register) ............................................................................. 9-45
9.4.4.29. VPWM0C (Video sync PWM0 Count Register) .................................................................................... 9-46
9.4.4.30. VPWM1C (Video sync PWM1 Count Register) .................................................................................... 9-46
9.4.4.31. VPWM2C (Video sync PWM2 Count Register) .................................................................................... 9-47
9.4.4.32. VPWM3C (Video sync PWM3 Count Register) .................................................................................... 9-47
9.4.4.33. PFC (Pixel FIFO Control Register) ........................................................................................................ 9-48
9.4.4.34. PFD (Pixel FIFO Depth Register) .......................................................................................................... 9-48
9.5. APPLICATION NOTES ....................................................................................................................... 9-49
9.5.1. Processing flow .......................................................................................................................... 9-49
9.5.2. Overlay Pattern .......................................................................................................................... 9-50
9.5.3. Fade in / Fade out flow .............................................................................................................. 9-51
9.5.4. Display Parameter Settings........................................................................................................ 9-52
10. TIMING CONTROLLER (TCON) ............................................................................................ 10-1
10.1. OUTLINE ..................................................................................................................................... 10-1
10.2. FEATURES ................................................................................................................................... 10-1
10.2.1. Features.................................................................................................................................. 10-1
10.3. BLOCK DIAGRAM ........................................................................................................................ 10-2
10.4. REGISTERS .................................................................................................................................. 10-3
10.4.1. Format of Register Descriptions ............................................................................................ 10-3
10.4.2. Global Address ....................................................................................................................... 10-3
10.4.3. Register summary................................................................................................................... 10-3
10.4.4. Register Description............................................................................................................... 10-6
10.4.4.1. DIR_SSqCnts[0...63].............................................................................................................................. 10-6
10.4.4.2. DIR_SWreset.......................................................................................................................................... 10-6
10.4.4.3. DIR_SPG0PosOn ................................................................................................................................... 10-7
FUJITSU SEMICONDUCTOR
PROPRIETARY AND CONFIDENTIAL
xi

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