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EFM32JG1 데이터시트 PDF




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EFM32JG1 데이터시트, 핀배열, 회로
EFM32 Jade Gecko Family
EFM32JG1 Data Sheet
The EFM32 Jade Gecko MCUs are the world’s most energy-
friendly microcontrollers.
EFM32JG1 features a powerful 32-bit ARM® Cortex®-M3 and a wide selection of periph-
erals, including a unique cryptographic hardware engine supporting AES, ECC, and
SHA. These features, combined with ultra-low current active mode and short wake-up
time from energy-saving modes, make EFM32JG1 microcontrollers well suited for any
battery-powered application, as well as other systems requiring high performance and
low-energy consumption.
Example applications:
• IoT devices and sensors
• Health and fitness
• Smart accessories
• Home automation and security
• Industrial and factory automation
ENERGY FRIENDLY FEATURES
• ARM Cortex-M3 at 40 MHz
• Ultra low energy operation:
• 1.1 μA EM3 Stop current (CRYOTIMER
running with state/RAM retention)
• 1.4 μA EM2 DeepSleep current (RTCC
running with state and RAM retention)
• 60 μA/MHz in Energy Mode 0 (EM0)
• Hardware cryptographic engine supports
AES, ECC, and SHA
• Integrated dc-dc converter
• CRYOTIMER operates down to EM4
• 5 V tolerant I/O
Core / Memory
ARM CortexTM M3 processor
Memory
Protection Unit
Flash Program
Memory
RAM Memory Debug Interface DMA Controller
Clock Management
High Frequency
Crystal
Oscillator
Low Frequency
RC Oscillator
Low Frequency
Crystal
Oscillator
High Frequency
RC Oscillator
Auxiliary High
Frequency RC
Oscillator
Ultra Low
Frequency RC
Oscillator
Energy Management
Voltage
Regulator
Voltage Monitor
DC-DC
Converter
Power-On Reset
Brown-Out
Detector
Serial Interfaces
I/O Ports
32-bit bus
Peripheral Reflex System
Timers and Triggers
Analog Interfaces
Other
USART
Low Energy UARTTM
I2C
External Interrupts
General Purpose I/O
Pin Reset
Pin Wakeup
Timer/Counter
Pulse Counter
Watchdog Timer
Low Energy Timer
Real Time Counter
and Calendar
CRYOTIMER
ADC
Analog Comparator
IDAC
CRYPTO
CRC
Lowest power mode with peripheral operational:
EM0 - Active
EM1 - Sleep
EM2 – Deep Sleep
EM3 - Stop
EM4 - Hibernate
EM4 - Shutoff
silabs.com | Smart. Connected. Energy-friendly.
This information applies to a product under development. Its characteristics and specifications are subject to change without notice.
Preliminary Rev. 0.31




EFM32JG1 pdf, 반도체, 판매, 대치품
3. System Overview
EFM32JG1 Data Sheet
System Overview
3.1 Introduction
The EFM32JG1 product family is well suited for any battery operated application as well as other systems requiring high performance
and low energy consumption. This section gives a short introduction to the MCU system. The detailed functional description can be
found in the EFM32JG1 Reference Manual.
A block diagram of the EFM32JG1 family is shown in Figure 3.1 Detailed EFM32JG1 Block Diagram on page 3. The diagram shows
a superset of features available on the family, which vary by OPN. For more information about specific device features, consult Order-
ing Information.
Serial Wire
RESETn
DVDD
VREGVDD
VREGSW
VREGVSS
VSS
HFXTAL_P
HFXTAL_N
Debug /
Programming
Hardware
ARM Cortex-M3 Core
Up to 256 KB ISP Flash
Program Memory
Reset
Reset
Management
Unit
Voltage
Monitor / Brown
Out Detector
Up to 32 KB RAM
Memory Protection Unit
DMA Controller
Power Net
bypass
DC-DC
Converter
Watchdog
Timer
Clock Configuration
LFXTAL_P
LFXTAL_N
ULFRCO
LFXO
HFXO
HFRCO
AUXHFRCO
LFRCO
AA
HP
BB
Port I/O Configuration
Digital Peripherals
LETIMER
TIMER
CRYOTIMER
PCNT
RTC / RTCC
USART
Port
Mapper
LEUART
I2C
CRYPTO
CRC
Analog Peripherals
Internal
Reference
IDAC
VDD
VREF
12-bit ADC
VDD
Temp
Sensor
+
-
Analog Comparator
Figure 3.1. Detailed EFM32JG1 Block Diagram
Port A
Drivers
Port B
Drivers
Port C
Drivers
Port D
Drivers
Port F
Drivers
IOVDD
PAn
PBn
PCn
PDn
PFn
silabs.com | Smart. Connected. Energy-friendly.
Preliminary Rev. 0.31 | 3

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EFM32JG1 전자부품, 판매, 대치품
EFM32JG1 Data Sheet
System Overview
3.6.2 Low Energy Universal Asynchronous Receiver/Transmitter (LEUART)
The unique LEUARTTM provides two-way UART communication on a strict power budget. Only a 32.768 kHz clock is needed to allow
UART communication up to 9600 baud. The LEUART includes all necessary hardware to make asynchronous serial communication
possible with a minimum of software intervention and energy consumption.
3.6.3 Inter-Integrated Circuit Interface (I2C)
The I2C module provides an interface between the MCU and a serial I2C bus. It is capable of acting as both a master and a slave and
supports multi-master buses. Standard-mode, fast-mode and fast-mode plus speeds are supported, allowing transmission rates from 10
kbit/s up to 1 Mbit/s. Slave arbitration and timeouts are also available, allowing implementation of an SMBus-compliant system. The
interface provided to software by the I2C module allows precise timing control of the transmission process and highly automated trans-
fers. Automatic recognition of slave addresses is provided in active and low energy modes.
3.6.4 Peripheral Reflex System (PRS)
The Peripheral Reflex System provides a communication network between different peripheral modules without software involvement.
Peripheral modules producing Reflex signals are called producers. The PRS routes Reflex signals from producers to consumer periph-
erals which in turn perform actions in response. Edge triggers and other functionality can be applied by the PRS. The PRS allows pe-
ripheral to act autonomously without waking the MCU core, saving power.
3.7 Security Features
3.7.1 GPCRC (General Purpose Cyclic Redundancy Check)
The GPCRC module implements a Cyclic Redundancy Check (CRC) function. It supports both 32-bit and 16-bit polynomials. The sup-
ported 32-bit polynomial is 0x04C11DB7 (IEEE 802.3), while the 16-bit polynomial can be programmed to any value, depending on the
needs of the application. Common 16-bit polynomials are 0x1021 (CCITT-16), and 0x8005 (802.15.4, and USB).
3.7.2 Crypto Accelerator (CRYPTO)
The Crypto Accelerator is a fast and energy-efficient autonomous hardware encryption and decryption accelerator. EFM32JG1 devices
support AES encryption and decryption with 128- or 256-bit keys, ECC over both GF(P) and GF(2m), and SHA-1 and SHA-2 (SHA-224
and SHA-256).
Supported modes of operation for AES include: ECB, CTR, CBC, PCBC, CFB, OFB, CBC-MAC, GMAC and CCM.
Supported ECC NIST recommended curves include P-192, P-224, P-256, K-163, K-233, B-163 and B-233.
The CRYPTO module allows fast processing of GCM (AES), ECC and SHA with little CPU intervention. CRYPTO also provides trigger
signals for DMA read and write operations.
3.8 Analog
3.8.1 Analog Port (APORT)
The Analog Port (APORT) is an analog interconnect matrix allowing access to analog modules ADC, ACMP, and IDAC on a flexible
selection of pins. Each APORT bus consists of analog switches connected to a common wire. Since many clients can operate differen-
tially, buses are grouped by X/Y pairs.
3.8.2 Analog Comparator (ACMP)
The Analog Comparator is used to compare the voltage of two analog inputs, with a digital output indicating which input voltage is high-
er. Inputs are selected from among internal references and external pins. The tradeoff between response time and current consumption
is configurable by software. Two 6-bit reference dividers allow for a wide range of internally-programmable reference sources. The
ACMP can also be used to monitor the supply voltage. An interrupt can be generated when the supply falls below or rises above the
programmable threshold.
silabs.com | Smart. Connected. Energy-friendly.
Preliminary Rev. 0.31 | 6

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