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부품번호 | IRFHM8228PBF 기능 |
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기능 | Power MOSFET ( Transistor ) | ||
제조업체 | International Rectifier | ||
로고 | |||
VDSS
VGS max
RDS(on) max
(@ VGS = 10V)
(@ VGS = 4.5V)
Qg (typical)
ID
(@TC (Bottom) = 25°C)
25
±20
5.2
8.7
9.0
25
V
V
m
nC
A
Applications
Control or synchronous MOSFET for synchronous buck converter
IRFHM8228PbF
HEXFET® Power MOSFET
S SG
S
D
D
D
D
D
PQFN 3.3X3.3 mm
Features
Low Thermal Resistance to PCB (<3.7°C/W)
Low Profile (<1.05 mm)
Industry-Standard Pinout
Compatible with Existing Surface Mount Techniques
RoHS Compliant, Halogen-Free
MSL1, Consumer Qualification
Benefits
Enable better thermal dissipation
Increased Power Density
results in Multi-Vendor Compatibility
Easier Manufacturing
Environmentally Friendlier
Increased Reliability
Base part number
IRFHM8228PbF
Package Type
PQFN 3.3 mm x 3.3 mm
Standard Pack
Form
Quantity
Tape and Reel
4000
Orderable Part Number
IRFHM8228TRPbF
Absolute Maximum Ratings
VGS
ID @ TA = 25°C
ID @ TA = 70°C
ID @ TC(Bottom) = 25°C
ID @ TC(Bottom) = 100°C
ID @ TC = 25°C
IDM
PD @TA = 25°C
PD @TC(Bottom) = 25°C
TJ
TSTG
Parameter
Gate-to-Source Voltage
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
(Source Bonding Technology Limited)
Pulsed Drain Current
Power Dissipation
Power Dissipation
Linear Derating Factor
Operating Junction and
Storage Temperature Range
Notes through are on page 10
Max.
± 20
19
15
65
41
25
260
2.8
34
0.023
-55 to + 150
Units
V
A
W
W/°C
°C
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1000
100 TJ = 150°C
10
TJ = 25°C
1
0.1
0.0
VGS = 0V
0.4 0.8 1.2 1.6
VSD, Source-to-Drain Voltage (V)
2.0
Fig 7. Typical Source-Drain Diode Forward Voltage
70
60
Limited by source
bonding technology
50
40
30
20
10
0
25
50 75 100 125
TC , Case Temperature (°C)
150
Fig 9. Maximum Drain Current vs. Case Temperature
10
IRFHM8228PbF
1000
100
OPERATION IN THIS AREA
LIMITED BY R DS(on)
10
Limited by source bonding
technology
1
100µsec
1msec
0.1 Tc = 25°C
Tj = 150°C
Single Pulse
0.01
0.1 1
10msec
DC
10 100
VDS, Drain-to-Source Voltage (V)
Fig 8. Maximum Safe Operating Area
3.0
2.5
2.0
1.5 ID = 25µA
ID = 250µA
ID = 1.0mA
1.0 ID = 1.0A
0.5
-75 -50 -25 0 25 50 75 100 125 150
TJ , Temperature ( °C )
Fig 10. Drain-to–Source Breakdown Voltage
D = 0.50
1 0.20
0.10
0.05
0.1 0.02
0.01
0.01
0.001
1E-006
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
1E-005
0.0001
0.001
0.01
t1 , Rectangular Pulse Duration (sec)
0.1
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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Placement and Layout Guidelines
The typical application topology for this product is the synchronous buck converter. These converters operate at high
frequencies (typically around 400 kHz). During turn-on and turn-off switching cycles, the high di/dt currents circulating in
the parasitic elements of the circuit induce high voltage ringing which may exceed the device rating and lead to
undesirable effects. One of the major contributors to the increase in parasitics is the PCB power circuit inductance.
This section introduces a simple guideline that mitigates the effect of these parasitics on the performance of the circuit
and provides reliable operation of the devices.
To reduce high frequency switching noise and the effects of Electromagnetic Interference (EMI) when the control
MOSFET (Q1) is turned on, the layout shown in Figure 19 is recommended. The input bypass capacitors, control
MOSFET and output capacitors are placed in a tight loop to minimize parasitic inductance which in turn lowers the
amplitude of the switch node ringing, and minimizes exposure of the MOSFETs to repetitive avalanche conditions.
Fig 19. Placement and Layout Guidelines
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IRFHM8228PBF | Power MOSFET ( Transistor ) | International Rectifier |
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