5497 PDF 데이터시트 검색

5497 DM7497 Synchronous Modulo-64 Bit Rate Multiplier June 1989 5497 DM7497 Synchronous Modulo-64 Bit Rate Multiplier General Description The ’97 contains a synchronous 6-stage binary counter and six decoding gates that serve to gate the clock through to the output at a sub-multiple of the input frequency The output pulse rate relative to the clock frequency is determined by signals applied to the Select (S0 S5) inputs Both true and complement outputs are available along with an enable input