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74LVC1G175 PDF 데이터시트 검색

 



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Single D-type flip-flop

74LVC1G175 Single D-type flip-flop with reset; positive-edge trigger Rev. 6 11 October 2013 Product data sheet 1. General description The 74LVC1G175 is a low-power, low-voltage single positive edge triggered D-type flip-flop with individual data (D) input, clock (CP) input, master reset (MR) input, and Q output. The master reset (MR) is an asynchronous active LOW input and operates independently of the clock input. Information on the data input is transferred to the Q output on the LOW-to-H
NXP Semiconductors
NXP Semiconductors

DataSheet.kr       |      2020      |     연락처      |     링크모음      |      신규     |      사이트맵 :    1,      2