80960JD-40 PDF 데이터시트 검색

A s s PRELIMINARY 80960JD EMBEDDED 32-BIT MICROPROCESSOR Pin, Code Compatible with all 80960Jx Processors High-Performance Embedded Architecture One Instruction, Clock Execution Core Clock Rate is 2x the Bus Clock Load, Store Programming Model Sixteen 32-Bit Global Registers Sixteen 32-Bit Local Registers (8 sets) Nine Addressing Modes User, Supervisor Protection Model Two-Way Set Associative Instruction Cache 80960JD - 4 Kbyte Programmable Cache Locking Mechanism Direct Mapped Data