80960SB PDF 데이터시트 검색

80960SB EMBEDDED 32-BIT MICROPROCESSOR WITH 16-BIT BURST DATA BUS s High-Performance Embedded Architecture s Built-in Interrupt Controller 16 MIPS* Burst Execution at 16 MH- 5 MIPS Sustained Execution at 16 MH- s 512-Byte On-Chip Instruction Cache Direct Mapped Parallel Load, Decode for Uncached Instructions s Multiple Register Sets Sixteen Global 32-Bit Registers Sixteen Local 32-Bit Registers Four Local Register Sets Stored On-Chip Register Scoreboarding s Pin Compatible with 80960SA