CY2PP326 PDF 데이터시트 검색

FastEdge™ Series CY2PP326 2 x 2 Clock and Data Switch Buffer Features Six ECL, PECL differential outputs Two ECL, PECL differential inputs Hot-swappable, -insertable 50 ps output-to-output skew 250 ps device-to-device skew 950 ps propagation delay (typical) 1.2 GH- Operation 2.8 ps RMS period jitter (max.) PECL mode supply range: VEE = 2.5V± 5% to 3.3V±5% with VEE = 0V ECL mode supply range: VCC = 2.5V± 5% to 3.3V±5% with VEE = 0V Industrial temperature range: 40°C to 85°