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GAL20LV8D-3LJ PDF 데이터시트 검색

 



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Low Voltage E2CMOS PLD Generic Array Logic

Ne Tolew 5V Inp rant u 20L ts on V8D Features HIGH PERFORMANCE E2CMOS® TECHNOLOGY 3.5 ns Maximum Propagation Delay Fmax = 250 MH- 2.5 ns Maximum from Clock Input to Data Output UltraMOS® Advanced CMOS Technology TTL-Compatible Balanced 8mA Output Drive 3.3V LOW VOLTAGE 20V8 ARCHITECTURE JEDEC-Compatible 3.3V Interface Standard 5V Compatible Inputs ACTIVE PULL-UPS ON ALL PINS E2 CELL TECHNOLOGY Reconfigurable Logic Reprogrammable Cells 100% Tested, 100% Yields High Speed Electric
Lattice Semiconductor
Lattice Semiconductor

DataSheet.kr       |      2020      |     연락처      |     링크모음      |      신규     |      사이트맵 :    1,      2