ICS87354I PDF 데이터시트 검색

PRELIMINARY Integrated Circuit Systems, Inc. ICS87354I ÷4, ÷5 DIFFERENTIAL-TO-2.5V, 3.3V LVPECL CLOCK GENERATOR FEATURES 1 differential 2.5V, 3.3V LVPECL , ECL output 1 CLK, nCLK input pair CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL Maximum output frequency: 250MH- Input frequency: >1GH- Translates any single ended input signal to 3.3V LVPECL levels with resistor bias on nCLK input Output skew: 38ps (maximum) Part-to-part skew