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IDT71V433 PDF 데이터시트 검색

 



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Synchronous SRAM

32K x 32 3.3V Synchronous SRAM Flow-Through Outputs Features 32K x 32 memory configuration Supports high performance system speed: Commercial and Industrial: 11 11ns Clock-to-Data Access (50MHz) 12 12ns Clock-to-Data Access (50MHz) LBO input selects interleaved or linear burst mode Self-timed write cycle with global write control (GW), byte write enable (BWE), and byte writes (BWx) Power down controlled by ZZ input Single 3.3V power supply (+10, -5%) Packaged in a JEDEC Standard 100-pin rect
IDT
IDT

DataSheet.kr       |      2020      |     연락처      |     링크모음      |      신규     |      사이트맵 :    1,      2