MP2007 PDF 데이터시트 검색

MP2007 3A, 1.3V 6.0V DDR Memory Termination Regulator The Future of Analog IC Technology DESCRIPTION The MP20 07 integrates the DDR memory termination regulator with the ou tput voltage (VTT) and a buffered VTTREF outp uts is a half of VREF. The VTT-LDO is a 3A sink, so urce tracking termination regulator. It is spe cifically designed for low-cost, low-external component count systems, where space is a premium. The MP20 07 maintains a fast transient response o nly requiring 20uF (2 x10uF) of ce