RTAX250S PDF 데이터시트 검색

v5.3 RTAX-S, SL RadTolerant FPGAs Radiation Performance SEU-Hardened Registers Eliminate the Need for TripleModule Redundancy (TMR) Immune to Single-Event Upsets (SEU) to LETTH > 37 MeV-cm2, mg SEU Rate < 10-10 Errors, Bit-Day in Worst-Case Geosynchronous Orbit Expected SRAM Upset Rate of <10-10 Errors, Bit-Day with Use of Error Detection and Correction (EDAC) IP (included) with Integrated SRAM Scrubber Single-Bit Correction, Double-Bit Detection Variable-Rate Background Refreshing Total