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Data Sheet August 1999 LG1600FXH Clock and Data Regenerator Features s s s s s s s s s s Integrated clock recovery and data retiming Surface-mount package Single ECL supply Robust FPLL design Operation up to BER = 1e 3 SONET, SDH compatible loss of signal alarm High effective Q allows long run lengths Jitter tolerance exceeding ITU-T, Bellcore Low clock jitter generation: typical <0.005 UI Standard and custom data rates 0.50 Gbits, s 5.5 Gbits, s Complementary 50 Ω I, Os s Figure 1. LG1600