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PDF LP3986BL-285285 Data sheet ( Hoja de datos )
| Número de pieza | LP3986BL-285285 | |
| Descripción | Dual Micropower 150 mA Ultra Low-Dropout CMOS Voltage Regulators in micro SMD Package | |
| Fabricantes | National Semiconductor | |
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May 2003
LP3986
Dual Micropower 150 mA Ultra Low-Dropout CMOS
Voltage Regulators in micro SMD Package
General Description
The LP3986 is a 150 mA dual low dropout regulator de-
signed for portable and wireless applications with demand-
ing performance and board space requirements.
The LP3986 is stable with a small 1 µF ±30% ceramic output
capacitor requiring smallest possible board space.
The LP3986’s performance is optimized for battery powered
systems to deliver ultra low noise, extremely low dropout
voltage and low quiescent current independent of load cur-
rent. Regulator ground current increases very slightly in
dropout, further prolonging the battery life. Optional external
bypass capacitor reduces the output noise further without
slowing down the load transient response. Fast start-up time
is achieved by utilizing a speed-up circuit that actively pre-
charges the bypass capacitor. Power supply rejection is
better than 60 dB at low frequencies and 55 dB at 10 kHz.
High power supply rejection is maintained at low input volt-
age levels common to battery operated circuits.
The LP3986 is available in a micro SMD package. Perfor-
mance is specified for a −40˚C to +125˚C temperature
range. For single LDO applications, please refer to the
LP3985 datasheet.
Features
n Miniature 8-I/O micro SMD package
n Stable with 1µF ceramic and high quality tantalum
output capacitors
n Fast turn-on
n Two independent regulators
n Logic controlled enable
n Over current and thermal protection
Key Specifications
n Guaranteed 150 mA output current per regulator
n 1nA typical quiescent current when both regulators in
shutdown mode
n 60 mV typical dropout voltage at 150 mA output current
n 115 µA typical ground current
n 40 µV typical output noise
n 200 µs fast turn-on circuit
n −40˚C to +125˚C junction temperature
Applications
n CDMA cellular handsets
n GSM cellular handsets
n Portable information appliances
n Portable battery applications
Typical Application Circuit
© 2003 National Semiconductor Corporation DS200034
20003401
www.national.com
1 page  
Electrical Characteristics (Continued)
Unless otherwise specified: VIN = VOUT(nom) + 0.5V, CIN = 1 µF, IOUT = 1mA, COUT = 1 µF, CBYPASS = 0.01µF. Typical values
and limits appearing in standard typeface are for TJ = 25˚C. Limits appearing in boldface type apply over the entire junction
temperature range for operation, −40˚C to +125˚C. (Note 7) (Note 8)
Symbol
Parameter
Conditions
Limit
Typ Units
Min Max
en
ρn(1/f)
IEN
Output Noise Voltage
Output Noise Density
Maximum Input Current
at EN
BW = 10 Hz to 100 kHz,
COUT = 1µF
f = 120 Hz,
COUT = 1µF
VEN = 0.4 and VIN = 6V
40
1
±10
µVrms
µV/
nA
VIL
Maximum Low Level
VIN = 2.5 to 6V
Input Voltage at EN
0.4 V
VIH
Minimum High Level
VIN = 2.5 to 6V
Input Voltage at EN
1.4 V
Xtalk
COUT
Crosstalk Rejection
Capacitance
ESR
∆ILoad1 = 150 mA at 1KHz rate
∆ILoad2 = 1 mA
∆VOUT2/∆VOUT1
∆ILoad2 = 150 mA at 1KHz rate
∆ILoad1 = 1 mA
∆VOUT2/∆VOUT1
(Note 13)
(Note 14)
−60
−60
1
5
dB
22 µF
500 mΩ
Note 1: Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the device
is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the Electrical
Characteristics tables.
Note 2: All voltages are with respect to the potential at the GND pin.
Note 3: Additional information on pad temperature can be found in National Semiconductor Application Note (AN-1112).
Note 4: The Absolute Maximum power dissipation depends on the ambient temperature and can be calculated using the formula:
PD = (TJ - TA)/θJA,
Where TJ is the junction temperature, TA is the ambient temperature, and θJA is the junction-to-ambient thermal resistance. The 364mW rating appearing under
Absolute Maximum Ratings results from substituting the Absolute Maximum junction temperature, 150˚C, for TJ, 70˚C for TA, and 220˚C/W for θJA. More power can
be dissipated safely at ambient temperatures below 70˚C . Less power can be dissipated safely at ambient temperatures above 70˚C. The Absolute Maximum power
dissipation can be increased by 4.5mW for each degree below 70˚C, and it must be derated by 4.5mW for each degree above 70˚C.
Note 5: The human body model is 100pF discharged through a 1.5kΩ resistor into each pin. The machine model is a 200pF capacitor discharged directly into each
pin.
Note 6: Like the Absolute Maximum power dissipation, the maximum power dissipation for operation depends on the ambient temperature. The 250mW rating
appearing under Operating Ratings results from substituting the maximum junction temperature for operation, 125˚C, for TJ, 70˚C for TA, and 220˚C/W for θJA into
(1) above. More power can be dissipated at ambient temperatures below 70˚C . Less power can be dissipated at ambient temperatures above 70˚C. The maximum
power dissipation for operation can be increased by 4.5mW for each degree below 70˚C, and it must be derated by 4.5mW for each degree above 70˚C.
Note 7: All limits are guaranteed. All electrical characteristics having room temperature limits are tested during production with TJ = 25˚C or correlated using
Statistical Quality Control (SQC) methods. All hot and cold limits are guaranteed by correlating the electrical characteristics to process and temperature variations
and applying statistical process control.
Note 8: The target output voltage, which is labeled VOUT(nom), is the desired voltage option.
Note 9: The output voltage changes slightly with line voltage. An increase in the line voltage results in a slight increase in the output voltage and vice versa.
Note 10: The output voltage changes slightly with load current. An increase in the load current results in a slight decrease in the output voltage and vice versa.
Note 11: Dropout voltage is the input-to-output voltage difference at which the output voltage is 100mV below its nominal value.
Note 12: Turn-on time is that between the enable input just exceeding VIH and the output voltage just reaching 95% of its nominal value.
Note 13: Range of capacitor values for which the device will remain stable. This electrical specification is guaranteed by design.
Note 14: Range of capacitor ESR values for which the device will remain stable. This electrical specification is guaranteed by design.
5 www.national.com
5 Page 
Application Hints (Continued)
MICRO SMD MOUNTING
The micro SMD package requires specific mounting tech-
niques which are detailed in National Semiconductor Appli-
cation Note (AN-1112). Referring to the section Surface
Mount Technology (SMT) Assembly Considerations.
For best results during assembly, alignment ordinals on the
PC board may be used to facilitate placement of the micro
SMD device.
MICRO SMD LIGHT SENSITIVITY
Exposing the micro SMD device to direct sunlight will cause
misoperation of the device. Light sources such as halogen
lamps can effect electrical performance if brought near to the
device.
The wavelengths which have most detrimental effect are
reds and infra-reds, which means that the fluorescent light-
ing used inside most buildings has very little effect on per-
formance. A micro SMD test board was brought to within
1cm of a fluorescent desk lamp and the effect on the regu-
lated output voltage was negligible, showing a deviation of
less than 0.1% from nominal.
11 www.national.com
11 Page | ||
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| PDF Descargar | [ Datasheet LP3986BL-285285.PDF ] | |
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