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PDF LPC2210 Data sheet ( Hoja de datos )
| Número de pieza | LPC2210 | |
| Descripción | 16/32-bit ARM microcontroller with 10-bit ADC and external memory interface | |
| Fabricantes | NXP Semiconductors | |
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LPC2210
16/32-bit ARM microcontroller;
with 10-bit ADC and external memory interface
Rev. 01 — 09 February 2004
Preliminary data
1. General description
The LPC2210 is based on a 16/32 bit ARM7TDMI-S™ CPU with real-time emulation
and embedded trace support. For critical code size applications, the alternative 16-bit
Thumb Mode reduces code by more than 30% with minimal performance penalty.
With its 144 pin package, low power consumption, various 32-bit timers, 8-channel
10-bit ADC, PWM channels and up to 9 external interrupt pins this microcontroller is
particularly suitable for industrial control, medical systems, access control and
point-of-sale. LPC2210 provides up to 76 GPIO depending on bus configuration. With
a wide range of serial communications interfaces, it is also very well suited for
communication gateways, protocol converters and embedded soft modems as well
as many other general-purpose applications.
2. Features
2.1 Key features
s 16/32-bit ARM7TDMI-S microcontroller in a LQFP144 package.
s 16 kB on-chip Static RAM.
s Serial boot-loader using UART0 provides in-system download and programming
capabilities.
s EmbeddedICE-RT and Embedded Trace interfaces offer real-time debugging with
the on-chip RealMonitor software as well as high speed real-time tracing of
instruction execution.
s Eight channel 10-bit A/D converter with conversion time as low as 2.44 µs.
s Two 32-bit timers (with 4 capture and 4 compare channels), PWM unit (6 outputs),
Real Time Clock and Watchdog.
s Multiple serial interfaces including two UARTs (16C550), Fast I2C (400 kbits/s)
and two SPIs™.
s Vectored Interrupt Controller with configurable priorities and vector addresses.
s Configurable external memory interface with up to four banks, each up to 16 Mb
and 8/16/32 bit data width.
s Up to 76 general purpose I/O pins (5 V tolerant). Up to 9 edge or level sensitive
external interrupt pins available.
1 page  
Philips Semiconductors
LPC2210
16/32-bit ARM microcontrollers with external memory interface
5.2 Pin description
Table 3: Pin description
Symbol
Pin
Type
P0.0 to P0.31
42, 49, 50,
58, 59, 61,
68, 69, 75,
76, 78,
83-85, 92,
99, 100, 101,
121-123, 4-6,
8, 21, 23, 25,
3, 2, 33
I/O
P0.0 42 O
O
P0.1 49 I
O
I
P0.2 50 I/O
I
P0.3 58 I/O
O
I
P0.4 59 I/O
I
P0.5 61 I/O
O
P0.6 68 I/O
P0.7
P0.8
P0.9
P0.10
69
75
76
78
I
I
O
I
O
O
I
O
I
O
I
Description
Port 0: Port 0 is a 32-bit bi-directional I/O port with individual direction
controls for each bit. The operation of port 0 pins depends upon the pin
function selected via the Pin Connect Block.
Pins 26 and 31 of port 0 are not available.
TxD0 — Transmitter output for UART0.
PWM1 — Pulse Width Modulator output 1.
RxD0 — Receiver input for UART0.
PWM3 — Pulse Width Modulator output 3.
EINT0 — External interrupt 0 input
SCL — I2C clock input/output. Open drain output (for I2C compliance).
CAP0.0 — Capture input for Timer0, channel 0.
SDA — I2C data input/output. Open drain output (for I2C compliance).
MAT0.0 — Match output for Timer0, channel 0.
EINT1 — External interrupt 1 input.
SCK0 — Serial clock for SPI0. SPI clock output from master or input to slave.
CAP0.1 — Capture input for Timer0, channel 1.
MISO0 — Master In Slave OUT for SPI0. Data input to SPI master or data
output from SPI slave.
MAT0.1 — Match output for Timer0, channel 1.
MOSI0 — Master Out Slave In for SPI0. Data output from SPI master or data
input to SPI slave.
CAP0.2 — Capture input for Timer0, channel 2.
SSEL0 — Slave Select for SPI0. Selects the SPI interface as a slave.
PWM2 — Pulse Width Modulator output 2.
EINT2 — External interrupt 2 input.
TxD1 — Transmitter output for UART1.
PWM4 — Pulse Width Modulator output 4.
RxD1 — Receiver input for UART1.
PWM6 — Pulse Width Modulator output 6.
EINT3 — External interrupt 3 input.
RTS1 — Request to Send output for UART1.
CAP1.0 — Capture input for Timer1, channel 0.
9397 750 12872
Preliminary data
Rev. 01 — 09 February 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
5 of 39
5 Page 
Philips Semiconductors
LPC2210
16/32-bit ARM microcontrollers with external memory interface
6. Functional description
Details of the LPC2210 systems and peripheral functions are described in the
following sections.
6.1 Architectural overview
The ARM7TDMI-S is a general purpose 32-bit microprocessor, which offers high
performance and very low power consumption. The ARM architecture is based on
Reduced Instruction Set Computer (RISC) principles, and the instruction set and
related decode mechanism are much simpler than those of microprogrammed
Complex Instruction Set Computers. This simplicity results in a high instruction
throughput and impressive real-time interrupt response from a small and
cost-effective processor core.
Pipeline techniques are employed so that all parts of the processing and memory
systems can operate continuously. Typically, while one instruction is being executed,
its successor is being decoded, and a third instruction is being fetched from memory.
The ARM7TDMI-S processor also employs a unique architectural strategy known as
THUMB, which makes it ideally suited to high-volume applications with memory
restrictions, or applications where code density is an issue.
The key idea behind THUMB is that of a super-reduced instruction set. Essentially,
the ARM7TDMI-S processor has two instruction sets:
• The standard 32-bit ARM set.
• A 16-bit THUMB set.
The THUMB set’s 16-bit instruction length allows it to approach twice the density of
standard ARM code while retaining most of the ARM’s performance advantage over a
traditional 16-bit processor using 16-bit registers. This is possible because THUMB
code operates on the same 32-bit register set as ARM code.
THUMB code is able to provide up to 65% of the code size of ARM, and 160% of the
performance of an equivalent ARM processor connected to a 16-bit memory system.
6.2 On-Chip static RAM
On-Chip static RAM may be used for code and/or data storage. The SRAM may be
accessed as 8-bits, 16-bits, and 32-bits. The LPC2210 provides 16 kB of static RAM.
6.3 Memory map
The LPC2210 memory maps incorporate several distinct regions, as shown in the
following figures.
In addition, the CPU interrupt vectors may be re-mapped to allow them to reside in
either on-chip boot-loader, external memory BANK0 or on-chip static RAM. This is
described in Section 6.19 “System control”.
9397 750 12872
Preliminary data
Rev. 01 — 09 February 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
11 of 39
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