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PDF LPC11U1X Data sheet ( Hoja de datos )
| Número de pieza | LPC11U1X | |
| Descripción | 32-bit ARM Cortex-M0 microcontroller | |
| Fabricantes | NXP Semiconductors | |
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LPC11U1x
32-bit ARM Cortex-M0 microcontroller; up to 32 kB flash; 6 kB
SRAM; USB device; USART
Rev. 1 — 11 April 2011
Objective data sheet
1. General description
The LPC11U1x are a ARM Cortex-M0 based, low-cost 32-bit MCU family, designed for
8/16-bit microcontroller applications, offering performance, low power, simple instruction
set and memory addressing together with reduced code size compared to existing 8/16-bit
architectures.
The LPC11U1x operate at CPU frequencies of up to 50 MHz.
Equipped with a highly flexible and configurable Full Speed USB 2.0 device controller, the
LPC11U1x brings unparalleled design flexibility and seamless integration to today’s
demanding connectivity solutions.
The peripheral complement of the LPC11U1x includes up to 32 kB of flash memory, 6 kB
of SRAM data memory, one Fast-mode Plus I2C-bus interface, one RS-485/EIA-485
USART with support for synchronous mode and smart card interface, two SSP interfaces,
four general purpose counter/timers, a 10-bit ADC, and up to 40 general purpose I/O pins.
2. Features and benefits
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System:
ARM Cortex-M0 processor, running at frequencies of up to 50 MHz.
ARM Cortex-M0 built-in Nested Vectored Interrupt Controller (NVIC).
Non Maskable Interrupt (NMI) input selectable from several input sources.
System tick timer.
Memory:
Up to 32 kB on-chip flash program memory.
Total of 6 kB SRAM data memory (4 kB main SRAM and 2 kB USB SRAM).
16 kB boot ROM.
In-System Programming (ISP) and In-Application Programming (IAP) via on-chip
bootloader software.
Debug options:
Standard JTAG test/debug interface.
Serial Wire Debug.
Boundary scan for simplified board testing.
Digital peripherals:
Up to 40 General Purpose I/O (GPIO) pins with configurable pull-up/pull-down
resistors, repeater mode, and open-drain mode.
Up to 8 GPIO pins can beselected as edge and level sensitive interrupt sources.
1 page  
NXP Semiconductors
6. Pinning information
6.1 Pinning
LPC11U1x
32-bit ARM Cortex-M0 microcontroller
terminal 1
index area
PIO1_19/DTR/SSEL1
RESET/PIO0_0
PIO0_1/CLKOUT/CT32B0_MAT2/USB_FTOGGLE
XTALIN
XTALOUT
VDD
PIO0_20/CT16B1_CAP0
PIO0_2/SSEL0/CT16B0_CAP0
1
2
3
4
5
6
7
8
LPC11U1x
33 VSS
24 TRST/PIO0_14/AD3/CT32B1_MAT1
23 TDO/PIO0_13/AD2/CT32B1_MAT0
22 TMS/PIO0_12/AD1/CT32B1_CAP0
21 TDI/PIO0_11/AD0/CT32B0_MAT3
20 PIO0_22/AD6/CT16B1_MAT1/MISO1
19 SWCLK/PIO0_10/SCK0/CT16B0_MAT2
18 PIO0_9/MOSI0/CT16B0_MAT1
17 PIO0_8/MISO0/CT16B0_MAT0
002aaf888
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Fig 2. Pin configuration (HVQFN33)
Transparent top view
LPC11U1X
Objective data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 11 April 2011
© NXP B.V. 2011. All rights reserved.
5 of 64
5 Page 
NXP Semiconductors
Table 3. Pin description
Symbol
LPC11U1x
32-bit ARM Cortex-M0 microcontroller
Reset Type
state
[1]
Description
PIO0_18/RXD/
CT32B0_MAT0
PIO0_19/TXD/
CT32B0_MAT1
PIO0_20/CT16B1_CAP0
PIO0_21/CT16B1_MAT0/
MOSI1
PIO0_22/AD6/
CT16B1_MAT1/MISO1
PIO0_23/AD7
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PIO1_0/CT32B1_MAT0
PIO1_1/CT32B1_MAT1
PIO1_2/CT32B1_MAT2
31 46 B3 [3] I; PU I/O
-I
-O
32 47 B2 [3] I; PU I/O
-O
-O
7 9 F2 [3] I; PU I/O
-I
12 17 G4 [3] I; PU I/O
-O
20 30 E8
- I/O
[6] I; PU I/O
-I
-O
27 42 A5
- I/O
[6] I; PU I/O
-- -
-I
[3] I; PU I/O
-O
-- -
[3] I; PU I/O
-O
-- -
[3] I; PU I/O
-O
PIO0_18 — General purpose digital
input/output pin.
RXD — Receiver input for USART.
CT32B0_MAT0 — Match output 0 for 32-bit
timer 0.
PIO0_19 — General purpose digital
input/output pin.
TXD — Transmitter output for USART.
CT32B0_MAT1 — Match output 1 for 32-bit
timer 0.
PIO0_20 — General purpose digital
input/output pin.
CT16B1_CAP0 — Capture input 0 for 16-bit
timer 1.
PIO0_21 — General purpose digital
input/output pin.
CT16B1_MAT0 — Match output 0 for 16-bit
timer 1.
MOSI1 — Master Out Slave In for SSP1.
PIO0_22 — General purpose digital
input/output pin.
AD6 — A/D converter, input 6.
CT16B1_MAT1 — Match output 1 for 16-bit
timer 1.
MISO1 — Master In Slave Out for SSP1.
PIO0_23 — General purpose digital
input/output pin.
AD7 — A/D converter, input 7.
PIO1_0 — General purpose digital input/output
pin.
CT32B1_MAT0 — Match output 0 for 32-bit
timer 1.
PIO1_1 — General purpose digital input/output
pin.
CT32B1_MAT1 — Match output 1 for 32-bit
timer 1.
PIO1_2 — General purpose digital input/output
pin.
CT32B1_MAT2 — Match output 2 for 32-bit
timer 1.
LPC11U1X
Objective data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 11 April 2011
© NXP B.V. 2011. All rights reserved.
11 of 64
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet LPC11U1X.PDF ] | |
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