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PDF LPC1817JET100 Data sheet ( Hoja de datos )

Número de pieza LPC1817JET100
Descripción (LPC181x/2x/3x/4x/5x) 32-bit ARM Cortex-M3 MCU
Fabricantes NXP Semiconductors　
Logotipo NXP Semiconductors Logotipo



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LPC185x/3x/2x/1x
32-bit ARM Cortex-M3 MCU; up to 1 MB flash and 136 kB
SRAM; Ethernet, two High-speed USB, LCD, EMC
Rev. 4 — 31 October 2012
Preliminary data sheet
1. General description
The LPC185x/3x/2x/1x are ARM Cortex-M3 based microcontrollers for embedded
applications. The ARM Cortex-M3 is a next generation core that offers system
enhancements such as low power consumption, enhanced debug features, and a high
level of support block integration.
The LPC185x/3x/2x/1x operate at CPU frequencies of up to 180 MHz. The ARM
Cortex-M3 CPU incorporates a 3-stage pipeline and uses a Harvard architecture with
separate local instruction and data buses as well as a third bus for peripherals. The ARM
Cortex-M3 CPU also includes an internal prefetch unit that supports speculative
branching.
The LPC185x/3x/2x/1x include up to 1 MB of flash and 136 kB of on-chip SRAM, 16 kB of
EEPROM memory, a quad SPI Flash Interface (SPIFI), a State Configurable Timer (SCT)
subsystem, two High-speed USB controllers, Ethernet, LCD, an external memory
controller, and multiple digital and analog peripherals.
2. Features and benefits
Processor core
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ARM Cortex-M3 processor, running at CPU frequencies of up to 180 MHz.
ARM Cortex-M3 built-in Memory Protection Unit (MPU) supporting eight regions.
ARM Cortex-M3 built-in Nested Vectored Interrupt Controller (NVIC).
Non-maskable Interrupt (NMI) input.
JTAG and Serial Wire Debug, serial trace, eight breakpoints, and four watch points.
Enhanced Trace Module (ETM) and Enhanced Trace Buffer (ETB) support.
System tick timer.
On-chip memory
Up to 1 MB on-chip dual bank flash memory with flash accelerator.
16 kB on-chip EEPROM data memory.
136 kB SRAM for code and data use.
Multiple SRAM blocks with separate bus access.
64 kB ROM containing boot code and on-chip software drivers.
64 bit of One-Time Programmable (OTP) memory for general-purpose use.
Clock generation unit
Crystal oscillator with an operating range of 1 MHz to 25 MHz.
12 MHz internal RC oscillator trimmed to 2 % accuracy over temperature and
voltage (1 % accuracy for Tamb = 0 °C to 85 °C).
Datasheet pdf - http://www.DataSheet4U.co.kr/

1 page




LPC1817JET100 pdf
NXP Semiconductors
4.1 Ordering options
Table 2. Ordering options
LPC185x/3x/2x/1x
32-bit ARM Cortex-M3 microcontroller
LPC1857FET256 1 MB 512 kB 512 kB 136 kB yes yes yes yes/yes yes yes 8 F
LPC1857JET256 1 MB 512 kB 512 kB 136 kB yes yes yes yes/yes yes yes 8 J
LPC1857JBD208 1 MB 512 kB 512 kB 136 kB yes yes yes yes/yes yes yes 8 J
LPC1853FET256 512 kB 256 kB 256 kB 136 kB yes yes yes yes/yes yes yes 8 F
LPC1853JET256 512 kB 256 kB 256 kB 136 kB yes yes yes yes/yes yes yes 8 J
LPC1853JBD208 512 kB 256 kB 256 kB 136 kB yes yes yes yes/yes yes yes 8 J
LPC1837FET256 1 MB 512 kB 512 kB 136 kB no yes yes yes/yes yes yes 8 F
LPC1837JET256 1 MB 512 kB 512 kB 136 kB no yes yes yes/yes yes yes 8 J
LPC1837JBD144 1 MB 512 kB 512 kB 136 kB no yes yes yes/yes yes no 8 J
LPC1837JET100 1 MB 512 kB 512 kB 136 kB no yes yes yes/yes no no 4 J
LPC1833FET256 512 kB 256 kB 256 kB 136 kB no
LPC1833JET256 512 kB 256 kB 256 kB 136 kB no
yes
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yes
yes
yes
yes/yes yes
yes/yes yes
yes
yes
8
8
F
J
LPC1833JBD144 512 kB 256 kB 256 kB 136 kB no yes yes yes/yes yes no 8 J
LPC1833JET100 512 kB 256 kB 256 kB 136 kB no yes yes yes/yes no no 4 J
LPC1827JBD144 1 MB 512 kB 512 kB 136 kB no no yes no/no yes no 8 J
LPC1827JET100 1 MB 512 kB 512 kB 136 kB no no yes no/no no no 4 J
LPC1825JBD144 768 kB 384 kB 384 kB 136 kB no no yes no/no yes no 8 J
LPC1825JET100 768 kB 384 kB 384 kB 136 kB no no yes no/no no no 4 J
LPC1823JBD144 512 kB 256 kB 256 kB 104 kB no no yes no/no yes no 8 J
LPC1823JET100 512 kB 256 kB 256 kB 104 kB no no yes no/no no no 4 J
LPC1822JBD144 512 kB 512 kB 0 kB 104 kB no no yes no/no yes no 8 J
LPC1822JET100 512 kB 512 kB 0 kB 104 kB no no yes no/no no no 4 J
LPC1817JBD144 1 MB 512 kB 512 kB 136 kB no no no no/no yes no 8 J
LPC1817JET100 1 MB 512 kB 512 kB 136 kB no no no no/no no no 4 J
LPC1815JBD144 768 kB 384 kB 384 kB 136 kB no no no no/no yes no 8 J
LPC1815JET100 768 kB 384 kB 384 kB 136 kB no no no no/no no no 4 J
LPC1813JBD144 512 kB 256 kB 256 kB 104 kB no no no no/no yes no 8 J
LPC1813JET100 512 kB 256 kB 256 kB 104 kB no no no no/no no no 4 J
LPC1812JBD144 512 kB 512 kB 0 kB 104 kB no no no no/no yes no 8 J
LPC1812JET100 512 kB 512 kB 0 kB 104 kB no no no no/no no no 4 J
[1] J = -40 °C to +105 °C; F = -40 °C to +85 °C.
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LPC185X_3X_2X_1X
Preliminary data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 31 October 2012
© NXP B.V. 2012. All rights reserved.
5 of 147
Datasheet pdf - http://www.DataSheet4U.co.kr/

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LPC1817JET100 arduino
NXP Semiconductors
Table 3. Pin description …continued
Pin name
LPC185x/3x/2x/1x
32-bit ARM Cortex-M3 microcontroller
Description
P1_9
P1_10
P1_11
P1_12
T7 J5 52 73 [2] N; I/O GPIO1[2] — General purpose digital input/output pin.
PU O U1_RTS — Request to Send output for UART1.
O CTOUT_11 — SCT output 11. Match output 3 of
timer 2.
I/O EMC_D2 — External memory data line 2.
- R — Function reserved.
- R — Function reserved.
- R — Function reserved.
I/O SD_DAT0 — SD/MMC data bus line 0.
R8 H6 53 75 [2] N; I/O GPIO1[3] — General purpose digital input/output pin.
PU I U1_RI — Ring Indicator input for UART1.
O CTOUT_14 — SCT output 14. Match output 2 of timer 3.
I/O EMC_D3 — External memory data line 3.
- R — Function reserved.
- R — Function reserved.
- R — Function reserved.
I/O SD_DAT1 — SD/MMC data bus line 1.
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T9 J7 55 77 [2] N; I/O GPIO1[4] — General purpose digital input/output pin.
PU I U1_CTS — Clear to Send input for UART1.
O CTOUT_15 — SCT output 15. Match output 3 of timer 3.
I/O EMC_D4 — External memory data line 4.
- R — Function reserved.
- R — Function reserved.
- R — Function reserved.
I/O SD_DAT2 — SD/MMC data bus line 2.
R9 K7 56 78 [2] N; I/O GPIO1[5] — General purpose digital input/output pin.
PU I U1_DCD — Data Carrier Detect input for UART1.
- R — Function reserved.
I/O EMC_D5 — External memory data line 5.
I T0_CAP1 — Capture input 1 of timer 0.
- R — Function reserved.
- R — Function reserved.
I/O SD_DAT3 — SD/MMC data bus line 3.
LPC185X_3X_2X_1X
Preliminary data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 31 October 2012
© NXP B.V. 2012. All rights reserved.
11 of 147
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